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From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] recordmcount: arm: Implement make_nop
Date: Mon, 1 Feb 2016 11:44:32 -0800	[thread overview]
Message-ID: <20160201194432.GK4848@codeaurora.org> (raw)
In-Reply-To: <20160130184005.GA29607@debian>

On 01/30, Rabin Vincent wrote:
> On Fri, Jan 29, 2016 at 05:18:06PM -0800, Stephen Boyd wrote:
> > diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
> > index e167592793a7..0b16d14c54fb 100644
> > --- a/scripts/recordmcount.c
> > +++ b/scripts/recordmcount.c
> > @@ -206,6 +206,52 @@ static int make_nop_x86(void *map, size_t const offset)
> >  	return 0;
> >  }
> >  
> > +/*
> > + * Indicates if ARM is using __gnu_mcount_nc or mcount style and if
> > + * we should replace it with a pop or a nop respectively.
> > + */
> 
> For __gnu_mcount_nc, wouldn't it be better to replace both the push {lr}
> and the bl with nop instructions, instead of keeping a (useless) push +
> pop sequence?

Agreed. I was trying to do a 1-to-1 copy of the ftrace code on
ARM.  I was wondering the same thing in that code path while
doing this though. Can't we replace both instructions instead of
one instruction when we're patching in nops at runtime?

> 
> > +static int uses_altmcount;
> > +
> > +static unsigned char ideal_nop4_arm_arm[4] = { 0x00, 0x40, 0xbd, 0xe8 };
> > +static unsigned char ideal_nop4_arm_thumb[4] = { 0x5d, 0xf8, 0x04, 0xeb };
> > +static unsigned char ideal_nop4_arm_arm_be[4] = { 0xe8, 0xbd, 0x40, 0x00 };
> > +static unsigned char ideal_nop4_arm_thumb_be[4] = { 0xf8, 0x5d, 0xeb, 0x04 };
> > +static unsigned char ideal_nop4_arm_old[4] = { 0x00, 0x00, 0xa0, 0xe1 };
> > +static unsigned char ideal_nop4_arm_old_be[4] = { 0xe1, 0xa0, 0x00, 0x00 };
> > +
> > +static unsigned char bl_gnu_mcount_nc_arm[4] = { 0xfe, 0xff, 0xff, 0xeb };
> > +static unsigned char bl_gnu_mcount_nc_thumb[4] = { 0xff, 0xf7, 0xfe, 0xff };
> > +static unsigned char bl_gnu_mcount_nc_arm_be[4] = { 0xeb, 0xff, 0xff, 0xfe };
> > +static unsigned char bl_gnu_mcount_nc_thumb_be[4] = { 0xf7, 0xff, 0xff, 0xfe };
> 
> Comments showing what assembly instructions all these correspond to
> would be helpful.

Sure.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@codeaurora.org>
To: Rabin Vincent <rabin@rab.in>
Cc: Steven Rostedt <rostedt@goodmis.org>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Russell King <linux@arm.linux.org.uk>
Subject: Re: [PATCH] recordmcount: arm: Implement make_nop
Date: Mon, 1 Feb 2016 11:44:32 -0800	[thread overview]
Message-ID: <20160201194432.GK4848@codeaurora.org> (raw)
In-Reply-To: <20160130184005.GA29607@debian>

On 01/30, Rabin Vincent wrote:
> On Fri, Jan 29, 2016 at 05:18:06PM -0800, Stephen Boyd wrote:
> > diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
> > index e167592793a7..0b16d14c54fb 100644
> > --- a/scripts/recordmcount.c
> > +++ b/scripts/recordmcount.c
> > @@ -206,6 +206,52 @@ static int make_nop_x86(void *map, size_t const offset)
> >  	return 0;
> >  }
> >  
> > +/*
> > + * Indicates if ARM is using __gnu_mcount_nc or mcount style and if
> > + * we should replace it with a pop or a nop respectively.
> > + */
> 
> For __gnu_mcount_nc, wouldn't it be better to replace both the push {lr}
> and the bl with nop instructions, instead of keeping a (useless) push +
> pop sequence?

Agreed. I was trying to do a 1-to-1 copy of the ftrace code on
ARM.  I was wondering the same thing in that code path while
doing this though. Can't we replace both instructions instead of
one instruction when we're patching in nops at runtime?

> 
> > +static int uses_altmcount;
> > +
> > +static unsigned char ideal_nop4_arm_arm[4] = { 0x00, 0x40, 0xbd, 0xe8 };
> > +static unsigned char ideal_nop4_arm_thumb[4] = { 0x5d, 0xf8, 0x04, 0xeb };
> > +static unsigned char ideal_nop4_arm_arm_be[4] = { 0xe8, 0xbd, 0x40, 0x00 };
> > +static unsigned char ideal_nop4_arm_thumb_be[4] = { 0xf8, 0x5d, 0xeb, 0x04 };
> > +static unsigned char ideal_nop4_arm_old[4] = { 0x00, 0x00, 0xa0, 0xe1 };
> > +static unsigned char ideal_nop4_arm_old_be[4] = { 0xe1, 0xa0, 0x00, 0x00 };
> > +
> > +static unsigned char bl_gnu_mcount_nc_arm[4] = { 0xfe, 0xff, 0xff, 0xeb };
> > +static unsigned char bl_gnu_mcount_nc_thumb[4] = { 0xff, 0xf7, 0xfe, 0xff };
> > +static unsigned char bl_gnu_mcount_nc_arm_be[4] = { 0xeb, 0xff, 0xff, 0xfe };
> > +static unsigned char bl_gnu_mcount_nc_thumb_be[4] = { 0xf7, 0xff, 0xff, 0xfe };
> 
> Comments showing what assembly instructions all these correspond to
> would be helpful.

Sure.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2016-02-01 19:44 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-30  1:18 [PATCH] recordmcount: arm: Implement make_nop Stephen Boyd
2016-01-30  1:18 ` Stephen Boyd
2016-01-30 18:40 ` Rabin Vincent
2016-01-30 18:40   ` Rabin Vincent
2016-02-01 19:44   ` Stephen Boyd [this message]
2016-02-01 19:44     ` Stephen Boyd
2016-02-02 17:31     ` Rabin Vincent
2016-02-02 17:31       ` Rabin Vincent
2016-02-02 17:51       ` Steven Rostedt
2016-02-02 17:51         ` Steven Rostedt

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