From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Krzysztof Adamski <k@japko.eu>
Cc: inus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Lee Jones <lee-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Jens Kuske <jenskuske-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Fabian Frederick <fabf-AgBVmzD5pcezQB+pC5nmwQ@public.gmane.org>,
Vishnu Patekar
<vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set
Date: Fri, 5 Feb 2016 12:15:49 +0100 [thread overview]
Message-ID: <20160205111549.GC31506@lukather> (raw)
In-Reply-To: <1454542430-16572-6-git-send-email-k-P4rZei/IPtg@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 800 bytes --]
On Thu, Feb 04, 2016 at 12:33:50AM +0100, Krzysztof Adamski wrote:
> sunxi_pmx_set accepts pin number and then calculates offset by
> subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
> gets offset so we have to convert it to pin number so we won't get
> negative value in sunxi_pmx_set.
>
> This was only used on A10 so far, where there is only one GPIO chip with
> pin_base set to 0 so it didn't matter. However H3 also requires this
> workaround but have two pinmux sections, triggering problem for PL port.
>
> Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set
Date: Fri, 5 Feb 2016 12:15:49 +0100 [thread overview]
Message-ID: <20160205111549.GC31506@lukather> (raw)
In-Reply-To: <1454542430-16572-6-git-send-email-k@japko.eu>
On Thu, Feb 04, 2016 at 12:33:50AM +0100, Krzysztof Adamski wrote:
> sunxi_pmx_set accepts pin number and then calculates offset by
> subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
> gets offset so we have to convert it to pin number so we won't get
> negative value in sunxi_pmx_set.
>
> This was only used on A10 so far, where there is only one GPIO chip with
> pin_base set to 0 so it didn't matter. However H3 also requires this
> workaround but have two pinmux sections, triggering problem for PL port.
>
> Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Krzysztof Adamski <k@japko.eu>
Cc: inus Walleij <linus.walleij@linaro.org>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Jens Kuske <jenskuske@gmail.com>,
Fabian Frederick <fabf@skynet.be>,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set
Date: Fri, 5 Feb 2016 12:15:49 +0100 [thread overview]
Message-ID: <20160205111549.GC31506@lukather> (raw)
In-Reply-To: <1454542430-16572-6-git-send-email-k@japko.eu>
[-- Attachment #1: Type: text/plain, Size: 791 bytes --]
On Thu, Feb 04, 2016 at 12:33:50AM +0100, Krzysztof Adamski wrote:
> sunxi_pmx_set accepts pin number and then calculates offset by
> subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
> gets offset so we have to convert it to pin number so we won't get
> negative value in sunxi_pmx_set.
>
> This was only used on A10 so far, where there is only one GPIO chip with
> pin_base set to 0 so it didn't matter. However H3 also requires this
> workaround but have two pinmux sections, triggering problem for PL port.
>
> Signed-off-by: Krzysztof Adamski <k@japko.eu>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2016-02-05 11:15 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-03 23:33 [PATCH v3 0/5] pinctrl: sunxi: Add H3 R_PIO controller support Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
[not found] ` <1454542430-16572-1-git-send-email-k-P4rZei/IPtg@public.gmane.org>
2016-02-03 23:33 ` [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3 Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
[not found] ` <1454542430-16572-2-git-send-email-k-P4rZei/IPtg@public.gmane.org>
2016-02-04 14:47 ` Jean-Francois Moine
2016-02-04 14:47 ` Jean-Francois Moine
2016-02-04 14:47 ` Jean-Francois Moine
[not found] ` <20160204154752.4df7808be3364a98c496c030-GANU6spQydw@public.gmane.org>
2016-02-04 20:56 ` Krzysztof Adamski
2016-02-04 20:56 ` Krzysztof Adamski
2016-02-04 20:56 ` Krzysztof Adamski
[not found] ` <20160204205602.GC12071-xLeyfSbClftGit24Ens98Q@public.gmane.org>
2016-02-05 11:14 ` Maxime Ripard
2016-02-05 11:14 ` Maxime Ripard
2016-02-05 11:14 ` Maxime Ripard
2016-02-05 11:11 ` Maxime Ripard
2016-02-05 11:11 ` Maxime Ripard
2016-02-05 11:11 ` Maxime Ripard
2016-02-05 11:58 ` Krzysztof Adamski
2016-02-05 11:58 ` Krzysztof Adamski
2016-02-05 11:58 ` Krzysztof Adamski
[not found] ` <20160205115837.GD12071-xLeyfSbClftGit24Ens98Q@public.gmane.org>
2016-02-09 17:10 ` Maxime Ripard
2016-02-09 17:10 ` Maxime Ripard
2016-02-09 17:10 ` Maxime Ripard
2016-02-10 7:17 ` Krzysztof Adamski
2016-02-10 7:17 ` [linux-sunxi] " Krzysztof Adamski
2016-02-10 7:17 ` Krzysztof Adamski
[not found] ` <20160210071713.GA19622-xLeyfSbClftGit24Ens98Q@public.gmane.org>
2016-02-10 15:06 ` Maxime Ripard
2016-02-10 15:06 ` [linux-sunxi] " Maxime Ripard
2016-02-10 15:06 ` Maxime Ripard
2016-02-06 10:26 ` Jean-Francois Moine
2016-02-06 10:26 ` Jean-Francois Moine
2016-02-06 10:26 ` Jean-Francois Moine
2016-02-09 17:11 ` Maxime Ripard
2016-02-09 17:11 ` Maxime Ripard
2016-02-03 23:33 ` [PATCH v3 2/5] dts: sun8i-h3: Add APB0 related clocks and resets Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` [PATCH v3 3/5] pinctrl: sunxi: Add H3 R_PIO controller support Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-05 9:44 ` Chen-Yu Tsai
2016-02-05 9:44 ` Chen-Yu Tsai
[not found] ` <1454542430-16572-4-git-send-email-k-P4rZei/IPtg@public.gmane.org>
2016-02-05 9:46 ` Maxime Ripard
2016-02-05 9:46 ` Maxime Ripard
2016-02-05 9:46 ` Maxime Ripard
2016-02-03 23:33 ` [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
[not found] ` <1454542430-16572-5-git-send-email-k-P4rZei/IPtg@public.gmane.org>
2016-02-05 9:46 ` Chen-Yu Tsai
2016-02-05 9:46 ` Chen-Yu Tsai
2016-02-05 9:46 ` Chen-Yu Tsai
[not found] ` <CAGb2v67ftGhjPHjHKQ0iYnOeRbi5qcqyT2P1gePW=UoMm5QRig-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-02-08 8:39 ` Krzysztof Adamski
2016-02-08 8:39 ` Krzysztof Adamski
2016-02-08 8:39 ` Krzysztof Adamski
2016-02-03 23:33 ` [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski
2016-02-05 9:45 ` Chen-Yu Tsai
2016-02-05 9:45 ` Chen-Yu Tsai
[not found] ` <1454542430-16572-6-git-send-email-k-P4rZei/IPtg@public.gmane.org>
2016-02-05 11:15 ` Maxime Ripard [this message]
2016-02-05 11:15 ` Maxime Ripard
2016-02-05 11:15 ` Maxime Ripard
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