From: Shawn Guo <shawnguo@kernel.org>
To: Bai Ping <ping.bai@nxp.com>
Cc: kernel@pengutronix.de, pawel.moll@arm.com, robh+dt@kernel.org,
mturquette@baylibre.com, sboyd@codeaurora.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, jacky.baip@gmail.com
Subject: Re: [PATCH V3 1/5] clk: imx: Add clock support for imx6qp
Date: Sun, 14 Feb 2016 11:21:03 +0800 [thread overview]
Message-ID: <20160214032103.GD6756@tiger> (raw)
In-Reply-To: <1454407298-15545-1-git-send-email-ping.bai@nxp.com>
On Tue, Feb 02, 2016 at 06:01:34PM +0800, Bai Ping wrote:
> most of the clock tree structures on i.MX6 Quad Plus are
> same as on i.MX6Q. there still some differences between
> these two SOCs. compared to the i.XM6Q, the differents of
> clocks on i.MX6QP is mainly on:
>
> 1. New clock gate added to support the PRE and PRG modules
> 2. 24MHz OSC clock option added to the UART, IPG, ECSPI, and
> CAN clock roots.
> 3. MMDC channel 1 clock gate is now controllable.
> 4. clock gating added to the LDB_DIx_IPU clocks on i.MX6QP
> 5. EMI clock root divider fix
> 6. other updates fo CSCMRx, CSCDRx and CS2CDR registers.
>
> detailed infomation, please refer to the i.MX6QP RM.
>
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
Applied all, thanks.
WARNING: multiple messages have this Message-ID (diff)
From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 1/5] clk: imx: Add clock support for imx6qp
Date: Sun, 14 Feb 2016 11:21:03 +0800 [thread overview]
Message-ID: <20160214032103.GD6756@tiger> (raw)
In-Reply-To: <1454407298-15545-1-git-send-email-ping.bai@nxp.com>
On Tue, Feb 02, 2016 at 06:01:34PM +0800, Bai Ping wrote:
> most of the clock tree structures on i.MX6 Quad Plus are
> same as on i.MX6Q. there still some differences between
> these two SOCs. compared to the i.XM6Q, the differents of
> clocks on i.MX6QP is mainly on:
>
> 1. New clock gate added to support the PRE and PRG modules
> 2. 24MHz OSC clock option added to the UART, IPG, ECSPI, and
> CAN clock roots.
> 3. MMDC channel 1 clock gate is now controllable.
> 4. clock gating added to the LDB_DIx_IPU clocks on i.MX6QP
> 5. EMI clock root divider fix
> 6. other updates fo CSCMRx, CSCDRx and CS2CDR registers.
>
> detailed infomation, please refer to the i.MX6QP RM.
>
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
Applied all, thanks.
next prev parent reply other threads:[~2016-02-14 3:21 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-02 10:01 [PATCH V3 1/5] clk: imx: Add clock support for imx6qp Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` [PATCH V3 2/5] ARM: dts: imx: Add basic dts support for imx6qp SOC Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` [PATCH V3 3/5] ARM: dts: imx: Add basic dts support for imx6qp-sabreauto Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` [PATCH V3 4/5] ARM: dts: imx: Add basic dts support for imx6qp-sabresd Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` [PATCH V3 5/5] ARM: imx: Add msl code support for imx6qp Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-02 10:01 ` Bai Ping
2016-02-14 3:21 ` Shawn Guo [this message]
2016-02-14 3:21 ` [PATCH V3 1/5] clk: imx: Add clock " Shawn Guo
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