From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 4/5] arm64/perf: Enable PMCR long cycle counter bit
Date: Thu, 18 Feb 2016 17:34:28 +0000 [thread overview]
Message-ID: <20160218173428.GE16883@arm.com> (raw)
In-Reply-To: <467597048eda3004bd69f1fbe3981aab111e00dd.1455810755.git.jglauber@cavium.com>
On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> With the long cycle counter bit (LC) disabled the cycle counter is not
> working on ThunderX SOC (ThunderX only implements Aarch64).
> Also, according to documentation LC == 0 is deprecated.
>
> To keep the code simple the patch does not introduce 64 bit wide counter
> functions. Instead writing the cycle counter always sets the upper
> 32 bits so overflow interrupts are generated as before.
>
> Original patch from Andrew Pinksi <Andrew.Pinksi@caviumnetworks.com>
What does this mean? Do we need Andrew's S-o-B, or is this a fresh patch?
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Jan Glauber <jglauber@cavium.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 4/5] arm64/perf: Enable PMCR long cycle counter bit
Date: Thu, 18 Feb 2016 17:34:28 +0000 [thread overview]
Message-ID: <20160218173428.GE16883@arm.com> (raw)
In-Reply-To: <467597048eda3004bd69f1fbe3981aab111e00dd.1455810755.git.jglauber@cavium.com>
On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> With the long cycle counter bit (LC) disabled the cycle counter is not
> working on ThunderX SOC (ThunderX only implements Aarch64).
> Also, according to documentation LC == 0 is deprecated.
>
> To keep the code simple the patch does not introduce 64 bit wide counter
> functions. Instead writing the cycle counter always sets the upper
> 32 bits so overflow interrupts are generated as before.
>
> Original patch from Andrew Pinksi <Andrew.Pinksi@caviumnetworks.com>
What does this mean? Do we need Andrew's S-o-B, or is this a fresh patch?
Will
next prev parent reply other threads:[~2016-02-18 17:34 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 16:50 [PATCH v4 0/5] Cavium ThunderX PMU support Jan Glauber
2016-02-18 16:50 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 1/5] arm64/perf: Rename Cortex A57 events Jan Glauber
2016-02-18 16:50 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 2/5] arm64/perf: Add Cavium ThunderX PMU support Jan Glauber
2016-02-18 16:50 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 3/5] arm64: dts: Add Cavium ThunderX specific PMU Jan Glauber
2016-02-18 16:50 ` Jan Glauber
2016-02-18 17:32 ` Will Deacon
2016-02-18 17:32 ` Will Deacon
2016-02-18 18:37 ` David Daney
2016-02-18 18:37 ` David Daney
2016-02-22 12:40 ` Jan Glauber
2016-02-22 12:40 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 4/5] arm64/perf: Enable PMCR long cycle counter bit Jan Glauber
2016-02-18 16:50 ` Jan Glauber
2016-02-18 17:34 ` Will Deacon [this message]
2016-02-18 17:34 ` Will Deacon
2016-02-18 18:28 ` Jan Glauber
2016-02-18 18:28 ` Jan Glauber
2016-02-18 18:57 ` David Daney
2016-02-18 18:57 ` David Daney
2016-02-22 12:45 ` Jan Glauber
2016-02-22 12:45 ` Jan Glauber
2016-02-22 13:41 ` Will Deacon
2016-02-22 13:41 ` Will Deacon
2016-02-29 15:39 ` Will Deacon
2016-02-29 15:39 ` Will Deacon
2016-03-01 7:21 ` Jan Glauber
2016-03-01 7:21 ` Jan Glauber
2016-03-01 15:10 ` Jan Glauber
2016-03-01 15:10 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 5/5] arm64/perf: Extend event mask for ARMv8.1 Jan Glauber
2016-02-18 16:50 ` Jan Glauber
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