From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org
Cc: Geethasowjanya.Akula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH] iommu/arm-smmu-v2: Add support for 16 bit VMID
Date: Fri, 19 Feb 2016 17:13:30 +0000 [thread overview]
Message-ID: <20160219171329.GO27062@arm.com> (raw)
In-Reply-To: <1455819817-8432-1-git-send-email-tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
On Thu, Feb 18, 2016 at 10:23:37AM -0800, tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org wrote:
> From: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
>
> ARM-SMMUv2 supports upto 16 bit VMID. This patch enables
> 16 bit VMID when requested from device-tree.
>
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
> ---
> .../devicetree/bindings/iommu/arm,smmu.txt | 2 ++
> drivers/iommu/arm-smmu.c | 21 ++++++++++++++++++++-
> 2 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 7180745..bb7e569 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -55,6 +55,8 @@ conditions.
> aliases of secure registers have to be used during
> SMMU configuration.
>
> +- smmu-enable-vmid16 : Enable 16 bit VMID, if allowed.
Why do we need a new property for this, given that we can detect it
from the ID registers? I can't think of a reason why we wouldn't use
16-bit VMIDs if they were available to us.
Will
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] iommu/arm-smmu-v2: Add support for 16 bit VMID
Date: Fri, 19 Feb 2016 17:13:30 +0000 [thread overview]
Message-ID: <20160219171329.GO27062@arm.com> (raw)
In-Reply-To: <1455819817-8432-1-git-send-email-tchalamarla@caviumnetworks.com>
On Thu, Feb 18, 2016 at 10:23:37AM -0800, tchalamarla at caviumnetworks.com wrote:
> From: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
>
> ARM-SMMUv2 supports upto 16 bit VMID. This patch enables
> 16 bit VMID when requested from device-tree.
>
> Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
> ---
> .../devicetree/bindings/iommu/arm,smmu.txt | 2 ++
> drivers/iommu/arm-smmu.c | 21 ++++++++++++++++++++-
> 2 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 7180745..bb7e569 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -55,6 +55,8 @@ conditions.
> aliases of secure registers have to be used during
> SMMU configuration.
>
> +- smmu-enable-vmid16 : Enable 16 bit VMID, if allowed.
Why do we need a new property for this, given that we can detect it
from the ID registers? I can't think of a reason why we wouldn't use
16-bit VMIDs if they were available to us.
Will
next prev parent reply other threads:[~2016-02-19 17:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 18:23 [PATCH] iommu/arm-smmu-v2: Add support for 16 bit VMID tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8
2016-02-18 18:23 ` tchalamarla at caviumnetworks.com
[not found] ` <1455819817-8432-1-git-send-email-tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-02-19 17:13 ` Will Deacon [this message]
2016-02-19 17:13 ` Will Deacon
[not found] ` <20160219171329.GO27062-5wv7dgnIgG8@public.gmane.org>
2016-02-19 18:36 ` Tirumalesh Chalamarla
2016-02-19 18:36 ` Tirumalesh Chalamarla
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