From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Vishnu Patekar
<vishnupatekar0510-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC
Date: Thu, 25 Feb 2016 10:49:44 -0800 [thread overview]
Message-ID: <20160225184944.GI4736@lukather> (raw)
In-Reply-To: <1456165255-31013-5-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 807 bytes --]
Hi,
On Mon, Feb 22, 2016 at 06:20:49PM +0000, Andre Przywara wrote:
> Based on the Allwinner A64 user manual and on the previous sunxi
> pinctrl drivers this introduces the pin multiplex assignments for
> the ARMv8 Allwinner A64 SoC.
> Port A is apparently used for the fixed function DRAM controller, so
> the ports start at B here (the manual mentions "n from 1 to 7", so
> not starting at 0).
>
> Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Linus, could you merge this patch for 4.6?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC
Date: Thu, 25 Feb 2016 10:49:44 -0800 [thread overview]
Message-ID: <20160225184944.GI4736@lukather> (raw)
In-Reply-To: <1456165255-31013-5-git-send-email-andre.przywara@arm.com>
Hi,
On Mon, Feb 22, 2016 at 06:20:49PM +0000, Andre Przywara wrote:
> Based on the Allwinner A64 user manual and on the previous sunxi
> pinctrl drivers this introduces the pin multiplex assignments for
> the ARMv8 Allwinner A64 SoC.
> Port A is apparently used for the fixed function DRAM controller, so
> the ports start at B here (the manual mentions "n from 1 to 7", so
> not starting at 0).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Linus, could you merge this patch for 4.6?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Andre Przywara <andre.przywara@arm.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
linux-sunxi@googlegroups.com, Arnd Bergmann <arnd@arndb.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-gpio@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC
Date: Thu, 25 Feb 2016 10:49:44 -0800 [thread overview]
Message-ID: <20160225184944.GI4736@lukather> (raw)
In-Reply-To: <1456165255-31013-5-git-send-email-andre.przywara@arm.com>
[-- Attachment #1: Type: text/plain, Size: 751 bytes --]
Hi,
On Mon, Feb 22, 2016 at 06:20:49PM +0000, Andre Przywara wrote:
> Based on the Allwinner A64 user manual and on the previous sunxi
> pinctrl drivers this introduces the pin multiplex assignments for
> the ARMv8 Allwinner A64 SoC.
> Port A is apparently used for the fixed function DRAM controller, so
> the ports start at B here (the manual mentions "n from 1 to 7", so
> not starting at 0).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Linus, could you merge this patch for 4.6?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2016-02-25 18:49 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-22 18:20 [PATCH v3 00/10] arm64: Introduce Allwinner A64 and Pine64 support Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 02/10] ARM: dts: sunxi: make PLL8 in the H3 a proper clock Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 03/10] arm64: Introduce Allwinner SoC config option Andre Przywara
2016-02-22 18:20 ` Andre Przywara
[not found] ` <1456165255-31013-1-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-22 18:20 ` [PATCH v3 04/10] drivers: pinctrl: add driver for Allwinner A64 SoC Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
[not found] ` <1456165255-31013-5-git-send-email-andre.przywara-5wv7dgnIgG8@public.gmane.org>
2016-02-25 18:49 ` Maxime Ripard [this message]
2016-02-25 18:49 ` Maxime Ripard
2016-02-25 18:49 ` Maxime Ripard
2016-03-07 3:33 ` Linus Walleij
2016-03-07 3:33 ` Linus Walleij
2016-03-07 3:33 ` Linus Walleij
2016-02-22 18:20 ` [PATCH v3 05/10] DT: clk: sunxi: add binding doc for the multi-bus-gates clock Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 06/10] clk: sunxi: add generic multi-parent bus clock gates driver Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 07/10] arm64: dts: add Allwinner A64 SoC .dtsi Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 08/10] of: add vendor prefix for Pine64 Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 09/10] arm64: dts: add Pine64 support Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-22 18:20 ` [PATCH v3 10/10] arm64: add defconfig options for Allwinner SoCs Andre Przywara
2016-02-22 18:20 ` Andre Przywara
2016-02-25 18:52 ` Maxime Ripard
2016-02-25 18:52 ` Maxime Ripard
2016-02-25 10:04 ` [PATCH v3 00/10] arm64: Introduce Allwinner A64 and Pine64 support Andre Przywara
2016-02-25 10:04 ` Andre Przywara
2016-02-25 19:25 ` Maxime Ripard
2016-02-25 19:25 ` Maxime Ripard
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