From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
To: Brian Norris <computersforpeace@gmail.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>,
Wenyou Yang <wenyou.yang@atmel.com>,
David Woodhouse <dwmw2@infradead.org>,
Josh Wu <rainyfeeling@outlook.com>,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Boris Brezillon <boris.brezillon@free-electrons.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3] mtd: atmel_nand: move the hsmc_clk from nfc node to nand node
Date: Thu, 25 Feb 2016 20:08:17 +0100 [thread overview]
Message-ID: <20160225190817.GK12073@piout.net> (raw)
In-Reply-To: <20160225183139.GL21465@google.com>
On 25/02/2016 at 10:31:39 -0800, Brian Norris wrote :
> + devicetree, Boris
>
> Convenient you left devicetree off, since I expect you'd get a hearty NAK
> from them...
>
> On Tue, Feb 23, 2016 at 11:49:31AM +0100, Nicolas Ferre wrote:
> > Le 23/02/2016 07:00, Wenyou Yang a écrit :
> > > From: Josh Wu <josh.wu@atmel.com>
> > >
> > > For SAMA5D3, SAMA5D4 SoC family, PMECC becomes a part of HSMC, they
> > > need the HSMC clock enabled to work.
> > > The NFC is a sub feature for current nand driver, it can be disabled.
> > > But if HSMC clock is controlled by NFC, so disable NFC will also disable
> > > the HSMC clock. then, it will make the PMECC fail to work.
> > >
> > > So the solution is move the HSMC clock out of NFC to nand node. When
> > > nand driver probed, it will check whether the chip has HSMC, if yes then
> > > it will require a HSMC clock.
> > >
> > > Add a new "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > >
> > > Signed-off-by: Josh Wu <josh.wu@atmel.com>
> > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > > ---
> > >
> > > Changes in v3:
> > > - add "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > > - revert the mail address of Josh's Signed-off to the original.
> >
> > It seems okay now:
> > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >
> > Brian, can we take this patch (if you acknowledged it) with us (through
> > the arm-soc tree) to keep the synchronization with the DT part of this work?
> > I will also consider squashing the DT part in this one as well as they
> > cannot be separated.
>
> Doesn't that mean you have an illegal breakage of the device tree?
>
> Also, if you're going to refactor the binding (and possibly even break
> it like this), why don't you address the comments Boris made back on the
> first version about a year ago?
>
> http://patchwork.ozlabs.org/patch/438211/
>
> Particularly, I agree that you seem to have the sub-node relationship
> all backward. Why is the controller a sub-node of the flash node? And
> you have no provision for multiple NAND chips?
>
Yes, we plan to break that binding even more, we don't have much choice.
I would agree that it would be better to break it only once though.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: alexandre.belloni@free-electrons.com (Alexandre Belloni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3] mtd: atmel_nand: move the hsmc_clk from nfc node to nand node
Date: Thu, 25 Feb 2016 20:08:17 +0100 [thread overview]
Message-ID: <20160225190817.GK12073@piout.net> (raw)
In-Reply-To: <20160225183139.GL21465@google.com>
On 25/02/2016 at 10:31:39 -0800, Brian Norris wrote :
> + devicetree, Boris
>
> Convenient you left devicetree off, since I expect you'd get a hearty NAK
> from them...
>
> On Tue, Feb 23, 2016 at 11:49:31AM +0100, Nicolas Ferre wrote:
> > Le 23/02/2016 07:00, Wenyou Yang a ?crit :
> > > From: Josh Wu <josh.wu@atmel.com>
> > >
> > > For SAMA5D3, SAMA5D4 SoC family, PMECC becomes a part of HSMC, they
> > > need the HSMC clock enabled to work.
> > > The NFC is a sub feature for current nand driver, it can be disabled.
> > > But if HSMC clock is controlled by NFC, so disable NFC will also disable
> > > the HSMC clock. then, it will make the PMECC fail to work.
> > >
> > > So the solution is move the HSMC clock out of NFC to nand node. When
> > > nand driver probed, it will check whether the chip has HSMC, if yes then
> > > it will require a HSMC clock.
> > >
> > > Add a new "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > >
> > > Signed-off-by: Josh Wu <josh.wu@atmel.com>
> > > Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> > > ---
> > >
> > > Changes in v3:
> > > - add "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > > - revert the mail address of Josh's Signed-off to the original.
> >
> > It seems okay now:
> > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >
> > Brian, can we take this patch (if you acknowledged it) with us (through
> > the arm-soc tree) to keep the synchronization with the DT part of this work?
> > I will also consider squashing the DT part in this one as well as they
> > cannot be separated.
>
> Doesn't that mean you have an illegal breakage of the device tree?
>
> Also, if you're going to refactor the binding (and possibly even break
> it like this), why don't you address the comments Boris made back on the
> first version about a year ago?
>
> http://patchwork.ozlabs.org/patch/438211/
>
> Particularly, I agree that you seem to have the sub-node relationship
> all backward. Why is the controller a sub-node of the flash node? And
> you have no provision for multiple NAND chips?
>
Yes, we plan to break that binding even more, we don't have much choice.
I would agree that it would be better to break it only once though.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Nicolas Ferre
<nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>,
Wenyou Yang <wenyou.yang-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>,
David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
Josh Wu <rainyfeeling-1ViLX0X+lBJBDgjK7y7TUQ@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Boris Brezillon
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v3] mtd: atmel_nand: move the hsmc_clk from nfc node to nand node
Date: Thu, 25 Feb 2016 20:08:17 +0100 [thread overview]
Message-ID: <20160225190817.GK12073@piout.net> (raw)
In-Reply-To: <20160225183139.GL21465-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
On 25/02/2016 at 10:31:39 -0800, Brian Norris wrote :
> + devicetree, Boris
>
> Convenient you left devicetree off, since I expect you'd get a hearty NAK
> from them...
>
> On Tue, Feb 23, 2016 at 11:49:31AM +0100, Nicolas Ferre wrote:
> > Le 23/02/2016 07:00, Wenyou Yang a écrit :
> > > From: Josh Wu <josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> > >
> > > For SAMA5D3, SAMA5D4 SoC family, PMECC becomes a part of HSMC, they
> > > need the HSMC clock enabled to work.
> > > The NFC is a sub feature for current nand driver, it can be disabled.
> > > But if HSMC clock is controlled by NFC, so disable NFC will also disable
> > > the HSMC clock. then, it will make the PMECC fail to work.
> > >
> > > So the solution is move the HSMC clock out of NFC to nand node. When
> > > nand driver probed, it will check whether the chip has HSMC, if yes then
> > > it will require a HSMC clock.
> > >
> > > Add a new "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > >
> > > Signed-off-by: Josh Wu <josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> > > Signed-off-by: Wenyou Yang <wenyou.yang-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> > > ---
> > >
> > > Changes in v3:
> > > - add "atmel,sama5d3-nand" compatiable string for SAMA5D3's nand.
> > > - revert the mail address of Josh's Signed-off to the original.
> >
> > It seems okay now:
> > Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> >
> > Brian, can we take this patch (if you acknowledged it) with us (through
> > the arm-soc tree) to keep the synchronization with the DT part of this work?
> > I will also consider squashing the DT part in this one as well as they
> > cannot be separated.
>
> Doesn't that mean you have an illegal breakage of the device tree?
>
> Also, if you're going to refactor the binding (and possibly even break
> it like this), why don't you address the comments Boris made back on the
> first version about a year ago?
>
> http://patchwork.ozlabs.org/patch/438211/
>
> Particularly, I agree that you seem to have the sub-node relationship
> all backward. Why is the controller a sub-node of the flash node? And
> you have no provision for multiple NAND chips?
>
Yes, we plan to break that binding even more, we don't have much choice.
I would agree that it would be better to break it only once though.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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next prev parent reply other threads:[~2016-02-25 19:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-23 6:00 [PATCH v3] mtd: atmel_nand: move the hsmc_clk from nfc node to nand node Wenyou Yang
2016-02-23 6:00 ` Wenyou Yang
2016-02-23 10:49 ` Nicolas Ferre
2016-02-23 10:49 ` Nicolas Ferre
2016-02-25 18:31 ` Brian Norris
2016-02-25 18:31 ` Brian Norris
2016-02-25 18:31 ` Brian Norris
2016-02-25 19:08 ` Alexandre Belloni [this message]
2016-02-25 19:08 ` Alexandre Belloni
2016-02-25 19:08 ` Alexandre Belloni
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