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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 drm/i915: rawclk/cdclk stuff (v2)
Date: Fri, 4 Mar 2016 14:56:03 +0200	[thread overview]
Message-ID: <20160304125603.GP10446@intel.com> (raw)
In-Reply-To: <1456932138-14004-1-git-send-email-ville.syrjala@linux.intel.com>

On Wed, Mar 02, 2016 at 05:22:12PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Here are the remainder of my cdclk/rawclk cleanup patches. Previous time I
> posted these was [1]. Bunch of them got already r-b'd by Jani. I also did
> the PWM DIV_ROUND_CLOSEST() changes as Jani suggested last time around.
> 
> Entire series is available here:
> git://github.com/vsyrjala/linux.git rawclk_freq_10
> 
> Ville Syrjälä (6):
>   drm/i915: Store rawclk_freq in dev_priv
>   drm/i915: Rename s/i9xx/g4x/ in DP code
>   drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV
>   drm/i915: Read out hrawclk from CCK on vlv/chv
>   drm/i915: Clean up .get_aux_clock_divider() functions
>   drm/i915: Use DIV_ROUND_CLOSEST for PWM calculations

Series pushed to dinq. Thanks for the reviews.

> 
>  drivers/gpu/drm/i915/i915_drv.h      |  1 +
>  drivers/gpu/drm/i915/i915_reg.h      |  1 +
>  drivers/gpu/drm/i915/intel_display.c | 56 +++++++++++++++++++++-------------
>  drivers/gpu/drm/i915/intel_dp.c      | 59 ++++++++++++++++--------------------
>  drivers/gpu/drm/i915/intel_drv.h     |  2 --
>  drivers/gpu/drm/i915/intel_panel.c   | 50 +++++++++++++++---------------
>  6 files changed, 87 insertions(+), 82 deletions(-)
> 
> -- 
> 2.4.10

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

      parent reply	other threads:[~2016-03-04 12:56 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-02 15:22 [PATCH v2 drm/i915: rawclk/cdclk stuff (v2) ville.syrjala
2016-03-02 15:22 ` [PATCH v2 1/6] drm/i915: Store rawclk_freq in dev_priv ville.syrjala
2016-03-03  8:47   ` Jani Nikula
2016-03-03 10:59     ` Ville Syrjälä
2016-03-02 15:22 ` [PATCH 2/6] drm/i915: Rename s/i9xx/g4x/ in DP code ville.syrjala
2016-03-02 15:22 ` [PATCH v2 3/6] drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV ville.syrjala
2016-03-02 15:22 ` [PATCH 4/6] drm/i915: Read out hrawclk from CCK on vlv/chv ville.syrjala
2016-03-03  8:51   ` Jani Nikula
2016-03-03 11:04     ` Ville Syrjälä
2016-03-03 18:13   ` Imre Deak
2016-03-02 15:22 ` [PATCH 5/6] drm/i915: Clean up .get_aux_clock_divider() functions ville.syrjala
2016-03-02 15:22 ` [PATCH 6/6] drm/i915: Use DIV_ROUND_CLOSEST for PWM calculations ville.syrjala
2016-03-03  8:25   ` Jani Nikula
2016-03-03 10:54     ` Ville Syrjälä
2016-03-02 16:55 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/i915: Store rawclk_freq in dev_priv Patchwork
2016-03-02 17:27   ` Ville Syrjälä
2016-03-04 12:56 ` Ville Syrjälä [this message]

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