From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915: Fix VLV/CHV unclaimed register errors
Date: Tue, 12 Apr 2016 19:13:24 +0300 [thread overview]
Message-ID: <20160412161324.GU4329@intel.com> (raw)
In-Reply-To: <20160411143051.20491.62078@emeril.freedesktop.org>
On Mon, Apr 11, 2016 at 02:30:51PM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix VLV/CHV unclaimed register errors
> URL : https://patchwork.freedesktop.org/series/5531/
> State : failure
>
> == Summary ==
>
> Series 5531v1 drm/i915: Fix VLV/CHV unclaimed register errors
> http://patchwork.freedesktop.org/api/1.0/series/5531/revisions/1/mbox/
>
> Test gem_busy:
> Subgroup basic-blt:
> pass -> INCOMPLETE (snb-dellxps)
Machine died?
Last lines in the log:
[ 219.031203] kms_flip: exiting, ret=0
[ 219.031690] [drm:connected_sink_compute_bpp] [CONNECTOR:35:HDMI-A-1] checking for sink bpp constrains
[ 219.031692] [drm:connected_sink_compute_bpp] clamping display bpp (was 36) to EDID reported max of 24
[ 219.031695] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
[ 219.031696] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
[ 219.031698] [drm:ironlake_check_fdi_lanes] checking fdi config on pipe A, lanes 2
[ 219.031700] [drm:intel_modeset_pipe_config] hw max bpp: 36, pipe bpp: 24, dithering: 0
[ 219.031702] [drm:intel_dump_pipe_config] [CRTC:26][modeset] config ffff880128230008 for pipe A
[ 219.031703] [drm:intel_dump_pipe_config] cpu_transcoder: A
[ 219.031704] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
[ 219.031706] [drm:intel_dump_pipe_config] fdi/pch: 1, lanes: 2, gmch_m: 6920601, gmch_n: 8388608, link_m: 288358, link_n: 524288, tu: 64
[ 219.031708] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[ 219.031709] [drm:intel_dump_pipe_config] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
[ 219.031711] [drm:intel_dump_pipe_config] audio: 1, infoframes: 1
[ 219.031712] [drm:intel_dump_pipe_config] requested mode:
[ 219.031714] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 219.031715] [drm:intel_dump_pipe_config] adjusted mode:
[ 219.031718] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 219.031720] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
[ 219.031721] [drm:intel_dump_pipe_config] port clock: 148500
[ 219.031722] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
[ 219.031724] [drm:intel_dump_pipe_config] num_scalers: 0, scaler_users: 0x0, scaler_id: 0
[ 219.031725] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[ 219.031726] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
[ 219.031727] [drm:intel_dump_pipe_config] ips: 0
[
> Subgroup basic-render:
> skip -> PASS (hsw-gt2)
> Test gem_ctx_param_basic:
> Subgroup invalid-ctx-get:
> pass -> DMESG-WARN (bsw-nuc-2)
> Subgroup non-root-set:
> pass -> DMESG-WARN (bsw-nuc-2)
> Test gem_exec_basic:
> Subgroup gtt-bsd:
> pass -> SKIP (bsw-nuc-2)
> Test gem_mmap_gtt:
> Subgroup basic-small-copy-xy:
> pass -> DMESG-WARN (bsw-nuc-2)
> Subgroup basic-write-no-prefault:
> pass -> DMESG-WARN (bsw-nuc-2)
> Test gem_storedw_loop:
> Subgroup basic-render:
> pass -> SKIP (bsw-nuc-2)
> Test gem_tiled_fence_blits:
> Subgroup basic:
> pass -> DMESG-FAIL (bsw-nuc-2)
> Test kms_addfb_basic:
> Subgroup no-handle:
> pass -> DMESG-WARN (bsw-nuc-2)
> Test kms_flip:
> Subgroup basic-flip-vs-modeset:
> dmesg-warn -> PASS (ilk-hp8440p) UNSTABLE
> Test kms_force_connector_basic:
> Subgroup force-edid:
> pass -> SKIP (ivb-t430s)
> Test kms_pipe_crc_basic:
> Subgroup read-crc-pipe-a-frame-sequence:
> pass -> SKIP (hsw-brixbox)
> Subgroup suspend-read-crc-pipe-c:
> pass -> DMESG-FAIL (bsw-nuc-2)
> Test pm_rpm:
> Subgroup basic-pci-d3-state:
> pass -> DMESG-WARN (bsw-nuc-2)
> Subgroup basic-rte:
> dmesg-warn -> PASS (bsw-nuc-2)
[ 452.682257] WARNING: CPU: 1 PID: 6456 at drivers/gpu/drm/drm_irq.c:1323 drm_wait_one_vblank+0x150/0x1a0
[ 452.682273] vblank wait timed out on crtc 2
[ 477.071090] [drm:i915_set_reset_status [i915]] *ERROR* gpu hanging too fast, banning!
[ 477.082011] drm/i915: Resetting chip after gpu hang
[ 483.074746] [drm:i915_set_reset_status [i915]] *ERROR* gpu hanging too fast, banning!
[ 483.080771] drm/i915: Resetting chip after gpu hang
BSW is generally unhappy about interrupts. I'll post some fixes soon, I hope.
>
> bdw-ultra total:202 pass:179 dwarn:0 dfail:0 fail:0 skip:23
> bsw-nuc-2 total:201 pass:152 dwarn:6 dfail:2 fail:0 skip:41
> byt-nuc total:201 pass:163 dwarn:0 dfail:0 fail:0 skip:38
> hsw-brixbox total:202 pass:177 dwarn:0 dfail:0 fail:0 skip:25
> hsw-gt2 total:202 pass:183 dwarn:0 dfail:0 fail:0 skip:19
> ilk-hp8440p total:202 pass:134 dwarn:0 dfail:0 fail:0 skip:68
> ivb-t430s total:202 pass:173 dwarn:0 dfail:0 fail:0 skip:29
> skl-i7k-2 total:202 pass:177 dwarn:0 dfail:0 fail:0 skip:25
> skl-nuci5 total:202 pass:191 dwarn:0 dfail:0 fail:0 skip:11
> snb-dellxps total:99 pass:78 dwarn:0 dfail:0 fail:0 skip:20
> snb-x220t total:202 pass:164 dwarn:0 dfail:0 fail:1 skip:37
>
> Results at /archive/results/CI_IGT_test/Patchwork_1862/
>
> 75635547cc623acbbe3941b93264e8cbb4686d29 drm-intel-nightly: 2016y-04m-11d-11h-18m-04s UTC integration manifest
> 95404e98fda24cf0dfeabe00ee7804eea06d18d0 Revert "drm/i915: Limit the auto arming of mmio debugs on vlv/chv"
> fc295dfee66f06591567d612d44dd2eb58850cc7 drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
> 35066da8bb1da5efe15530768c0b52eabec0c503 drm/i915: Move vlv_init_display_clock_gating() to the display power well
> 64ef8c05a4977c1213f4661ca550d598bca16729 drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstall
> fd065544c0dd09a7bb0333b89970baeb0cf19094 drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()
> c853feb33c049e8e68ec528c4d637d879cefb4bb drm/i915: Clear display interrupt before enabling when turning on the power well
> 87f3206fa3c5c221d0ae8663838626a8c7943c7d drm/i915: Move vlv/chv display irq code to a more logical place
> 1d4460e646432e31608f44579d015f0208b80657 drm/i915: Skip display irq setup if display irqs aren't flagged as enabled
> a0d1632e07bd77ac39a6121c262d2a612d08df0e drm/i915: Fix up vlv/chv display irq setup
> 6ed27b693027247102533f20c7b00af2f4f0265f drm/i915: Remove "VLV magic" from irq setup
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2016-04-12 16:13 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-11 13:56 [PATCH 00/10] drm/i915: Fix VLV/CHV unclaimed register errors ville.syrjala
2016-04-11 13:56 ` [PATCH 01/10] drm/i915: Remove "VLV magic" from irq setup ville.syrjala
2016-04-11 15:20 ` Imre Deak
2016-04-11 15:45 ` Ville Syrjälä
2016-04-11 13:56 ` [PATCH 02/10] drm/i915: Fix up vlv/chv display " ville.syrjala
2016-04-11 16:29 ` Imre Deak
2016-04-12 9:05 ` Ville Syrjälä
2016-04-12 10:12 ` Imre Deak
2016-04-12 15:56 ` [PATCH v2 " ville.syrjala
2016-04-11 13:56 ` [PATCH 03/10] drm/i915: Skip display irq setup if display irqs aren't flagged as enabled ville.syrjala
2016-04-11 16:31 ` Imre Deak
2016-04-11 13:56 ` [PATCH 04/10] drm/i915: Move vlv/chv display irq code to a more logical place ville.syrjala
2016-04-11 16:34 ` Imre Deak
2016-04-12 15:56 ` [PATCH v2 " ville.syrjala
2016-04-11 13:56 ` [PATCH 05/10] drm/i915: Clear display interrupt before enabling when turning on the power well ville.syrjala
2016-04-11 16:36 ` Imre Deak
2016-04-11 13:56 ` [PATCH 06/10] drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall() ville.syrjala
2016-04-11 16:38 ` Imre Deak
2016-04-11 13:56 ` [PATCH 07/10] drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstall ville.syrjala
2016-04-11 16:39 ` Imre Deak
2016-04-11 13:56 ` [PATCH 08/10] drm/i915: Move vlv_init_display_clock_gating() to the display power well ville.syrjala
2016-04-12 10:25 ` Imre Deak
2016-04-12 11:51 ` Ville Syrjälä
2016-04-11 13:56 ` [PATCH 09/10] drm/i915: Move DPINVGTT setup to vlv_display_irq_reset() ville.syrjala
2016-04-12 11:59 ` Imre Deak
2016-04-11 13:56 ` [PATCH 10/10] Revert "drm/i915: Limit the auto arming of mmio debugs on vlv/chv" ville.syrjala
2016-04-12 12:04 ` Imre Deak
2016-04-12 17:08 ` Ville Syrjälä
2016-04-12 19:56 ` Chris Wilson
2016-04-11 14:30 ` ✗ Fi.CI.BAT: failure for drm/i915: Fix VLV/CHV unclaimed register errors Patchwork
2016-04-12 16:13 ` Ville Syrjälä [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160412161324.GU4329@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.