[PATCH 1/2] ARM: dts: imx6ul: Fix operating points

[PATCH 1/2] ARM: dts: imx6ul: Fix operating points

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to 
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf

(a 25mV offset is added to the minimum allowed values for safety).

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
 arch/arm/boot/dts/imx6ul.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 7177899..4356b65 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -55,15 +55,15 @@
 			clock-latency = <61036>; /* two CLK32 periods */
 			operating-points = <
 				/* kHz	uV */
-				528000	1250000
-				396000	1150000
-				198000	1150000
+				528000	1175000
+				396000	1025000
+				198000	950000
 			>;
 			fsl,soc-operating-points = <
 				/* KHz	uV */
-				528000	1250000
-				396000	1150000
-				198000	1150000
+				528000	1175000
+				396000	1175000
+				198000	1175000
 			>;
 			clocks = <&clks IMX6UL_CLK_ARM>,
 				 <&clks IMX6UL_CLK_PLL2_BUS>,
-- 
1.9.1

[PATCH 2/2] ARM: dts: imx6sx: Add 198MHz operating point

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

198MHz is a valid operating point for mx6sx.

Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf

(a 25mV offset is added to the minimum allowed values for safety).

These values also match the ones from the NXP kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
 arch/arm/boot/dts/imx6sx.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index d02ab32..6a993bfda 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -63,12 +63,14 @@
 				996000  1250000
 				792000  1175000
 				396000  1075000
+				198000	975000
 			>;
 			fsl,soc-operating-points = <
 				/* ARM kHz  SOC uV */
 				996000      1175000
 				792000      1175000
 				396000      1175000
+				198000	    1175000
 			>;
 			clock-latency = <61036>; /* two CLK32 periods */
 			clocks = <&clks IMX6SX_CLK_ARM>,
-- 
1.9.1

[PATCH 1/2] ARM: dts: imx6ul: Fix operating points

[Shawn Guo]

On Mon, Apr 25, 2016 at 04:38:47PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to 
> Table-11 from MX6UL datasheet:
> http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf
> 
> (a 25mV offset is added to the minimum allowed values for safety).
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Applied both, thanks.