[PATCH 1/2] powerpc: Add mask of possible MMU features

[PATCH 1/2] powerpc: Add mask of possible MMU features

[Michael Ellerman]

Follow the example of the cpu feature code, and add a mask of possible
MMU features, MMU_FTRS_POSSIBLE.

This is used in mmu_has_feature(), which allows the possible mask to act
as a shortcut for any features that are not possible, but still allows
the feature bit itself to be defined.

We will use this feature in the next commit to fix a bug with the
recently add MMU_FTR_RADIX.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 arch/powerpc/include/asm/mmu.h | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index d91dc886c90f..a5e37c93700b 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -119,9 +119,21 @@
 DECLARE_PER_CPU(int, next_tlbcam_idx);
 #endif
 
+enum {
+	MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx |
+		MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E |
+		MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS |
+		MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX |
+		MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU |
+		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
+		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
+		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
+		MMU_FTR_1T_SEGMENT | MMU_FTR_RADIX,
+};
+
 static inline int mmu_has_feature(unsigned long feature)
 {
-	return (cur_cpu_spec->mmu_features & feature);
+	return (MMU_FTRS_POSSIBLE & cur_cpu_spec->mmu_features & feature);
 }
 
 static inline void mmu_clear_feature(unsigned long feature)
-- 
2.5.0

[PATCH 2/2] powerpc: Fix crash at boot with CONFIG_PPC_RADIX_MMU=n

[Michael Ellerman]

Currently a kernel that is built with CONFIG_PPC_RADIX_MMU=n, and then
booted on a 64-bit Hash MMU system will crash on the first SLB miss,
typically with an oops something like:

  Unrecoverable exception 4100 at c000000000969504
  cpu 0x0: Vector: 4100  at [c000000000de78e0]
      pc: c000000000969504: memmap_init_zone+0x160/0x2dc
      lr: c0000000009694b0: memmap_init_zone+0x10c/0x2dc
  ...
  [c000000000de7b60] c000000000968ec8 init_currently_empty_zone+0x3c/0x11c (unreliable)
  [c000000000de7bf0] c000000000969bc0 free_area_init_node+0x540/0x688
  [c000000000de7cf0] c000000000c4b3b4 free_area_init_nodes+0x7b4/0x864
  [c000000000de7df0] c000000000c2fce0 paging_init+0x88/0xa4
  [c000000000de7e60] c000000000c2b49c setup_arch+0x29c/0x2ec
  [c000000000de7f00] c000000000c23b7c start_kernel+0x88/0x524
  [c000000000de7f90] c000000000008c60 start_here_common+0x20/0xa0

This is caused by the branch in slb_miss_realmode() that jumps directly
to the unrecoverable case when MMU_FTR_RADIX is set:

  BEGIN_MMU_FTR_SECTION
  	b	2f
  END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX)

When CONFIG_PPC_RADIX_MMU=n, MMU_FTR_RADIX == 0, and so the test
becomes:

	(cur_cpu_spec->mmu_features & 0) == 0

Which is always true. This causes the branch to *not* be patched with a
nop, which is incorrect.

The root cause is my change to Aneesh's patch to make MMU_FTR_RADIX == 0
when CONFIG_PPC_RADIX_MMU=n, which was designed to allow the
radix_enabled() checks to compile out.

We can achieve the same result (in fact identical code generation) by
instead using MMU_FTRS_POSSIBLE and only adding MMU_FTR_RADIX to it when
CONFIG_PPC_RADIX_MMU=y.

Fixes: 418d145591b6 ("powerpc/mm/radix: Add MMU_FTR_RADIX")
Reported-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 arch/powerpc/include/asm/mmu.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index a5e37c93700b..ad68da9344c8 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -91,11 +91,7 @@
 /*
  * Radix page table available
  */
-#ifdef CONFIG_PPC_RADIX_MMU
 #define MMU_FTR_RADIX                  ASM_CONST(0x80000000)
-#else
-#define MMU_FTR_RADIX                  ASM_CONST(0)
-#endif
 
 /* MMU feature bit sets for various CPUs */
 #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2	\
@@ -128,7 +124,11 @@ enum {
 		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
 		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
 		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
-		MMU_FTR_1T_SEGMENT | MMU_FTR_RADIX,
+		MMU_FTR_1T_SEGMENT |
+#ifdef CONFIG_PPC_RADIX_MMU
+		MMU_FTR_RADIX |
+#endif
+		0
 };
 
 static inline int mmu_has_feature(unsigned long feature)
-- 
2.5.0

Re: [PATCH 2/2] powerpc: Fix crash at boot with CONFIG_PPC_RADIX_MMU=n

[Balbir Singh]

On Wed, 11 May 2016 16:47:11 +1000
Michael Ellerman <mpe@ellerman.id.au> wrote:

> Currently a kernel that is built with CONFIG_PPC_RADIX_MMU=n, and then
> booted on a 64-bit Hash MMU system will crash on the first SLB miss,
> typically with an oops something like:
> 
>   Unrecoverable exception 4100 at c000000000969504
>   cpu 0x0: Vector: 4100  at [c000000000de78e0]
>       pc: c000000000969504: memmap_init_zone+0x160/0x2dc
>       lr: c0000000009694b0: memmap_init_zone+0x10c/0x2dc
>   ...
>   [c000000000de7b60] c000000000968ec8 init_currently_empty_zone+0x3c/0x11c (unreliable)
>   [c000000000de7bf0] c000000000969bc0 free_area_init_node+0x540/0x688
>   [c000000000de7cf0] c000000000c4b3b4 free_area_init_nodes+0x7b4/0x864
>   [c000000000de7df0] c000000000c2fce0 paging_init+0x88/0xa4
>   [c000000000de7e60] c000000000c2b49c setup_arch+0x29c/0x2ec
>   [c000000000de7f00] c000000000c23b7c start_kernel+0x88/0x524
>   [c000000000de7f90] c000000000008c60 start_here_common+0x20/0xa0
> 
> This is caused by the branch in slb_miss_realmode() that jumps directly
> to the unrecoverable case when MMU_FTR_RADIX is set:
> 
>   BEGIN_MMU_FTR_SECTION
>   	b	2f
>   END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX)
> 

This makes sense and its a good way to avoid plenty of #ifdefs around code

Acked-by: Balbir Singh <bsingharora@gmail.com>

Balbir Singh

Re: [PATCH 2/2] powerpc: Fix crash at boot with CONFIG_PPC_RADIX_MMU=n

[Aneesh Kumar K.V]

Michael Ellerman <mpe@ellerman.id.au> writes:

> Currently a kernel that is built with CONFIG_PPC_RADIX_MMU=n, and then
> booted on a 64-bit Hash MMU system will crash on the first SLB miss,
> typically with an oops something like:
>
>   Unrecoverable exception 4100 at c000000000969504
>   cpu 0x0: Vector: 4100  at [c000000000de78e0]
>       pc: c000000000969504: memmap_init_zone+0x160/0x2dc
>       lr: c0000000009694b0: memmap_init_zone+0x10c/0x2dc
>   ...
>   [c000000000de7b60] c000000000968ec8 init_currently_empty_zone+0x3c/0x11c (unreliable)
>   [c000000000de7bf0] c000000000969bc0 free_area_init_node+0x540/0x688
>   [c000000000de7cf0] c000000000c4b3b4 free_area_init_nodes+0x7b4/0x864
>   [c000000000de7df0] c000000000c2fce0 paging_init+0x88/0xa4
>   [c000000000de7e60] c000000000c2b49c setup_arch+0x29c/0x2ec
>   [c000000000de7f00] c000000000c23b7c start_kernel+0x88/0x524
>   [c000000000de7f90] c000000000008c60 start_here_common+0x20/0xa0
>
> This is caused by the branch in slb_miss_realmode() that jumps directly
> to the unrecoverable case when MMU_FTR_RADIX is set:
>
>   BEGIN_MMU_FTR_SECTION
>   	b	2f
>   END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX)
>
> When CONFIG_PPC_RADIX_MMU=n, MMU_FTR_RADIX == 0, and so the test
> becomes:
>
> 	(cur_cpu_spec->mmu_features & 0) == 0
>
> Which is always true. This causes the branch to *not* be patched with a
> nop, which is incorrect.
>
> The root cause is my change to Aneesh's patch to make MMU_FTR_RADIX == 0
> when CONFIG_PPC_RADIX_MMU=n, which was designed to allow the
> radix_enabled() checks to compile out.
>
> We can achieve the same result (in fact identical code generation) by
> instead using MMU_FTRS_POSSIBLE and only adding MMU_FTR_RADIX to it when
> CONFIG_PPC_RADIX_MMU=y.
>
> Fixes: 418d145591b6 ("powerpc/mm/radix: Add MMU_FTR_RADIX")
> Reported-by: Alistair Popple <alistair@popple.id.au>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

> ---
>  arch/powerpc/include/asm/mmu.h | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
> index a5e37c93700b..ad68da9344c8 100644
> --- a/arch/powerpc/include/asm/mmu.h
> +++ b/arch/powerpc/include/asm/mmu.h
> @@ -91,11 +91,7 @@
>  /*
>   * Radix page table available
>   */
> -#ifdef CONFIG_PPC_RADIX_MMU
>  #define MMU_FTR_RADIX                  ASM_CONST(0x80000000)
> -#else
> -#define MMU_FTR_RADIX                  ASM_CONST(0)
> -#endif
>
>  /* MMU feature bit sets for various CPUs */
>  #define MMU_FTRS_DEFAULT_HPTE_ARCH_V2	\
> @@ -128,7 +124,11 @@ enum {
>  		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
>  		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
>  		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
> -		MMU_FTR_1T_SEGMENT | MMU_FTR_RADIX,
> +		MMU_FTR_1T_SEGMENT |
> +#ifdef CONFIG_PPC_RADIX_MMU
> +		MMU_FTR_RADIX |
> +#endif
> +		0
>  };
>
>  static inline int mmu_has_feature(unsigned long feature)
> -- 
> 2.5.0

Re: [PATCH 1/2] powerpc: Add mask of possible MMU features

[Aneesh Kumar K.V]

Michael Ellerman <mpe@ellerman.id.au> writes:

> Follow the example of the cpu feature code, and add a mask of possible
> MMU features, MMU_FTRS_POSSIBLE.
>
> This is used in mmu_has_feature(), which allows the possible mask to act
> as a shortcut for any features that are not possible, but still allows
> the feature bit itself to be defined.
>
> We will use this feature in the next commit to fix a bug with the
> recently add MMU_FTR_RADIX.
>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

> ---
>  arch/powerpc/include/asm/mmu.h | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
> index d91dc886c90f..a5e37c93700b 100644
> --- a/arch/powerpc/include/asm/mmu.h
> +++ b/arch/powerpc/include/asm/mmu.h
> @@ -119,9 +119,21 @@
>  DECLARE_PER_CPU(int, next_tlbcam_idx);
>  #endif
>
> +enum {
> +	MMU_FTRS_POSSIBLE = MMU_FTR_HPTE_TABLE | MMU_FTR_TYPE_8xx |
> +		MMU_FTR_TYPE_40x | MMU_FTR_TYPE_44x | MMU_FTR_TYPE_FSL_E |
> +		MMU_FTR_TYPE_47x | MMU_FTR_USE_HIGH_BATS | MMU_FTR_BIG_PHYS |
> +		MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_USE_TLBILX |
> +		MMU_FTR_LOCK_BCAST_INVAL | MMU_FTR_NEED_DTLB_SW_LRU |
> +		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |
> +		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |
> +		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |
> +		MMU_FTR_1T_SEGMENT | MMU_FTR_RADIX,
> +};
> +
>  static inline int mmu_has_feature(unsigned long feature)
>  {
> -	return (cur_cpu_spec->mmu_features & feature);
> +	return (MMU_FTRS_POSSIBLE & cur_cpu_spec->mmu_features & feature);
>  }
>
>  static inline void mmu_clear_feature(unsigned long feature)
> -- 
> 2.5.0