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* [master][PATCH] LINALG: Bump SRCREV for source code changes: 1. fixed potential memory leakage in ARM wrapper code 2. added offload tables for AM572x 3. cleaned up tuning code 4. added -ldl to linker options for building the examples
@ 2016-05-12 17:54 Jianzhong Xu
  2016-05-12 18:15 ` Denys Dmytriyenko
  0 siblings, 1 reply; 2+ messages in thread
From: Jianzhong Xu @ 2016-05-12 17:54 UTC (permalink / raw)
  To: meta-arago

Signed-off-by: Jianzhong Xu <xuj@ti.com>
---
 meta-arago-extras/recipes-ti/linalg/linalg.inc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/meta-arago-extras/recipes-ti/linalg/linalg.inc b/meta-arago-extras/recipes-ti/linalg/linalg.inc
index bb8efdf..4bf870d 100644
--- a/meta-arago-extras/recipes-ti/linalg/linalg.inc
+++ b/meta-arago-extras/recipes-ti/linalg/linalg.inc
@@ -2,7 +2,7 @@ HOMEPAGE = "git://git.ti.com/dense-linear-algebra-libraries/linalg.git"
 LICENSE = "BSD-3-Clause"
 
 PV = "1_2_0_0"
-INC_PR = "r1"
+INC_PR = "r2"
 
 S = "${WORKDIR}/git"
 
@@ -12,7 +12,7 @@ require recipes-ti/includes/ti-staging.inc
 BRANCH = "master"
 SRC_URI = "git://git.ti.com/dense-linear-algebra-libraries/linalg.git;protocol=git;branch=${BRANCH}"
 LIC_FILES_CHKSUM = "file://src/ti/linalg/docs/LINALG_1.2.0_manifest.html;md5=f30895e41e5947c3439b1ad4cf4c8555"
-SRCREV = "5e435f2457565ed7c6199406ef248370bb2a4ad2"
+SRCREV = "a7bc95a18a6ba11dbfc91dd65e16a478b756162c"
 
 DEPENDS = "common-csl-ip \
            libarch \
-- 
1.9.1



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [master][PATCH] LINALG: Bump SRCREV for source code changes: 1. fixed potential memory leakage in ARM wrapper code 2. added offload tables for AM572x 3. cleaned up tuning code 4. added -ldl to linker options for building the examples
  2016-05-12 17:54 [master][PATCH] LINALG: Bump SRCREV for source code changes: 1. fixed potential memory leakage in ARM wrapper code 2. added offload tables for AM572x 3. cleaned up tuning code 4. added -ldl to linker options for building the examples Jianzhong Xu
@ 2016-05-12 18:15 ` Denys Dmytriyenko
  0 siblings, 0 replies; 2+ messages in thread
From: Denys Dmytriyenko @ 2016-05-12 18:15 UTC (permalink / raw)
  To: Jianzhong Xu; +Cc: meta-arago

Your entire changelog went into the subject. You need to leave a blank line to 
separate one-line changelog from a detailed one.


On Thu, May 12, 2016 at 01:54:42PM -0400, Jianzhong Xu wrote:
> Signed-off-by: Jianzhong Xu <xuj@ti.com>
> ---
>  meta-arago-extras/recipes-ti/linalg/linalg.inc | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/meta-arago-extras/recipes-ti/linalg/linalg.inc b/meta-arago-extras/recipes-ti/linalg/linalg.inc
> index bb8efdf..4bf870d 100644
> --- a/meta-arago-extras/recipes-ti/linalg/linalg.inc
> +++ b/meta-arago-extras/recipes-ti/linalg/linalg.inc
> @@ -2,7 +2,7 @@ HOMEPAGE = "git://git.ti.com/dense-linear-algebra-libraries/linalg.git"
>  LICENSE = "BSD-3-Clause"
>  
>  PV = "1_2_0_0"
> -INC_PR = "r1"
> +INC_PR = "r2"
>  
>  S = "${WORKDIR}/git"
>  
> @@ -12,7 +12,7 @@ require recipes-ti/includes/ti-staging.inc
>  BRANCH = "master"
>  SRC_URI = "git://git.ti.com/dense-linear-algebra-libraries/linalg.git;protocol=git;branch=${BRANCH}"
>  LIC_FILES_CHKSUM = "file://src/ti/linalg/docs/LINALG_1.2.0_manifest.html;md5=f30895e41e5947c3439b1ad4cf4c8555"
> -SRCREV = "5e435f2457565ed7c6199406ef248370bb2a4ad2"
> +SRCREV = "a7bc95a18a6ba11dbfc91dd65e16a478b756162c"
>  
>  DEPENDS = "common-csl-ip \
>             libarch \
> -- 
> 1.9.1
> 
> _______________________________________________
> meta-arago mailing list
> meta-arago@arago-project.org
> http://arago-project.org/cgi-bin/mailman/listinfo/meta-arago


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2016-05-12 17:54 [master][PATCH] LINALG: Bump SRCREV for source code changes: 1. fixed potential memory leakage in ARM wrapper code 2. added offload tables for AM572x 3. cleaned up tuning code 4. added -ldl to linker options for building the examples Jianzhong Xu
2016-05-12 18:15 ` Denys Dmytriyenko

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