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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Hans de Goede <hdegoede@redhat.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Vishnu Patekar <vishnupatekar0510@gmail.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Boris Brezillon <boris.brezillon@free-electrons.com>
Subject: Re: [PATCH 14/16] clk: sunxi-ng: Add N-K-M-P factor clock
Date: Mon, 30 May 2016 09:57:30 +0200	[thread overview]
Message-ID: <20160530075730.GB4247@lukather> (raw)
In-Reply-To: <CAGb2v66b7jXrAs0rBrcHWskQQPqrhRVzY6OmCSoGZg2tfDJrDA@mail.gmail.com>

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Hi Chen-Yu,

On Mon, May 23, 2016 at 10:36:04PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 9, 2016 at 4:01 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Introduce support for clocks that use a combination of two linear
> > multipliers (N and K factors), one linear divider (M) and one power of two
> > divider (P).
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/sunxi-ng/Makefile   |   1 +
> >  drivers/clk/sunxi-ng/ccu_nkmp.c | 157 ++++++++++++++++++++++++++++++++++++++++
> >  drivers/clk/sunxi-ng/ccu_nkmp.h |  43 +++++++++++
> >  3 files changed, 201 insertions(+)
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nkmp.c
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nkmp.h
> >
> > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> > index 2bb8bc22e907..c794f57b6fb1 100644
> > --- a/drivers/clk/sunxi-ng/Makefile
> > +++ b/drivers/clk/sunxi-ng/Makefile
> > @@ -9,6 +9,7 @@ obj-y += ccu_mp.o
> >  obj-y += ccu_mux.o
> >  obj-y += ccu_nk.o
> >  obj-y += ccu_nkm.o
> > +obj-y += ccu_nkmp.o
> >  obj-y += ccu_nm.o
> >  obj-y += ccu_p.o
> >  obj-y += ccu_phase.o
> > diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
> > new file mode 100644
> > index 000000000000..b7da00773cd6
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
> > @@ -0,0 +1,157 @@
> > +/*
> > + * Copyright (C) 2016 Maxime Ripard
> > + * Maxime Ripard <maxime.ripard@free-electrons.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/rational.h>
> > +
> > +#include "ccu_gate.h"
> > +#include "ccu_nkmp.h"
> > +
> > +void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
> > +                       unsigned long max_n, unsigned long max_k,
> > +                       unsigned long max_m, unsigned long max_p,
> > +                       unsigned long *n, unsigned long *k,
> > +                       unsigned long *m, unsigned long *p)
> 
> We definitely should just pass struct ccu_nkmp* here.

Ok

> > +{
> > +       unsigned long best_rate = 0;
> > +       unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0;
> > +       unsigned long _n, _k, _m, _p;
> > +
> > +       for (_k = 1; _k <= max_k; _k++) {
> > +               for (_p = 0; _p <= max_p; _p++) {
> > +                       unsigned long tmp_rate;
> > +
> > +                       rational_best_approximation(rate / _k, parent << _p,
> 
> I think you mean "parent >> _p" ?

Indeed :/

> In general we might lose some precision if parent is too small or _p is
> too large. But the only place we see this type of clock is the CPU PLL,
> and parent (24 MHz) are divisible by all the possible values of P.
> 
> This brings up another issue: P does not go all the way up to (1 << width - 1).
> A register value of 3, or P = 8 is not valid, and it's not restricted in
> the driver. This is not true for all the SoCs though.
> 
> The manual also says P should only be used when rate < 288 MHz. Moving
> P to the outer loop, and maybe adding a short circuit exit when the rate
> matches exactly would help.

This is already something that was already reported by
Jean-Francois. Apart from the P limitation this is the current logic
used in the clock driver. We should probably fix that, but without any
user (ie, cpufreq), it's just wild guesses in the middle of a massive
and very intrusive changes.

So I don't really want to actually try to figure that out for now (and
this is exactly why I don't want to convert the SoCs with a good
support for now, since we'll pretty much uncover a whole lot of bugs
that would turn into regressions).

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 14/16] clk: sunxi-ng: Add N-K-M-P factor clock
Date: Mon, 30 May 2016 09:57:30 +0200	[thread overview]
Message-ID: <20160530075730.GB4247@lukather> (raw)
In-Reply-To: <CAGb2v66b7jXrAs0rBrcHWskQQPqrhRVzY6OmCSoGZg2tfDJrDA@mail.gmail.com>

Hi Chen-Yu,

On Mon, May 23, 2016 at 10:36:04PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 9, 2016 at 4:01 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Introduce support for clocks that use a combination of two linear
> > multipliers (N and K factors), one linear divider (M) and one power of two
> > divider (P).
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/sunxi-ng/Makefile   |   1 +
> >  drivers/clk/sunxi-ng/ccu_nkmp.c | 157 ++++++++++++++++++++++++++++++++++++++++
> >  drivers/clk/sunxi-ng/ccu_nkmp.h |  43 +++++++++++
> >  3 files changed, 201 insertions(+)
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nkmp.c
> >  create mode 100644 drivers/clk/sunxi-ng/ccu_nkmp.h
> >
> > diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> > index 2bb8bc22e907..c794f57b6fb1 100644
> > --- a/drivers/clk/sunxi-ng/Makefile
> > +++ b/drivers/clk/sunxi-ng/Makefile
> > @@ -9,6 +9,7 @@ obj-y += ccu_mp.o
> >  obj-y += ccu_mux.o
> >  obj-y += ccu_nk.o
> >  obj-y += ccu_nkm.o
> > +obj-y += ccu_nkmp.o
> >  obj-y += ccu_nm.o
> >  obj-y += ccu_p.o
> >  obj-y += ccu_phase.o
> > diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
> > new file mode 100644
> > index 000000000000..b7da00773cd6
> > --- /dev/null
> > +++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
> > @@ -0,0 +1,157 @@
> > +/*
> > + * Copyright (C) 2016 Maxime Ripard
> > + * Maxime Ripard <maxime.ripard@free-electrons.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + */
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/rational.h>
> > +
> > +#include "ccu_gate.h"
> > +#include "ccu_nkmp.h"
> > +
> > +void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
> > +                       unsigned long max_n, unsigned long max_k,
> > +                       unsigned long max_m, unsigned long max_p,
> > +                       unsigned long *n, unsigned long *k,
> > +                       unsigned long *m, unsigned long *p)
> 
> We definitely should just pass struct ccu_nkmp* here.

Ok

> > +{
> > +       unsigned long best_rate = 0;
> > +       unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0;
> > +       unsigned long _n, _k, _m, _p;
> > +
> > +       for (_k = 1; _k <= max_k; _k++) {
> > +               for (_p = 0; _p <= max_p; _p++) {
> > +                       unsigned long tmp_rate;
> > +
> > +                       rational_best_approximation(rate / _k, parent << _p,
> 
> I think you mean "parent >> _p" ?

Indeed :/

> In general we might lose some precision if parent is too small or _p is
> too large. But the only place we see this type of clock is the CPU PLL,
> and parent (24 MHz) are divisible by all the possible values of P.
> 
> This brings up another issue: P does not go all the way up to (1 << width - 1).
> A register value of 3, or P = 8 is not valid, and it's not restricted in
> the driver. This is not true for all the SoCs though.
> 
> The manual also says P should only be used when rate < 288 MHz. Moving
> P to the outer loop, and maybe adding a short circuit exit when the rate
> matches exactly would help.

This is already something that was already reported by
Jean-Francois. Apart from the P limitation this is the current logic
used in the clock driver. We should probably fix that, but without any
user (ie, cpufreq), it's just wild guesses in the middle of a massive
and very intrusive changes.

So I don't really want to actually try to figure that out for now (and
this is exactly why I don't want to convert the SoCs with a good
support for now, since we'll pretty much uncover a whole lot of bugs
that would turn into regressions).

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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  reply	other threads:[~2016-05-30  7:57 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-08 20:01 [PATCH 00/16] clk: sunxi: introduce "modern" clock support Maxime Ripard
2016-05-08 20:01 ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 01/16] clk: fix critical clock locking Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-09 22:11   ` Stephen Boyd
2016-05-09 22:11     ` Stephen Boyd
2016-05-13  7:50     ` Maxime Ripard
2016-05-13  7:50       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 02/16] clk: sunxi-ng: Add common infrastructure Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-09 10:01   ` Chen-Yu Tsai
2016-05-09 10:01     ` Chen-Yu Tsai
2016-05-15 18:31     ` Maxime Ripard
2016-05-15 18:31       ` Maxime Ripard
2016-05-16  7:02       ` Chen-Yu Tsai
2016-05-16  7:02         ` Chen-Yu Tsai
2016-05-16  8:02       ` Jean-Francois Moine
2016-05-16  8:02         ` Jean-Francois Moine
2016-05-16 20:15         ` Maxime Ripard
2016-05-16 20:15           ` Maxime Ripard
2016-05-17  6:54           ` Jean-Francois Moine
2016-05-17  6:54             ` Jean-Francois Moine
2016-05-18 19:59             ` Maxime Ripard
2016-05-18 19:59               ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 03/16] clk: sunxi-ng: Add fixed factor clock support Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-09 10:05   ` Chen-Yu Tsai
2016-05-09 10:05     ` Chen-Yu Tsai
2016-05-16 13:15     ` Jean-Francois Moine
2016-05-16 13:15       ` Jean-Francois Moine
2016-05-16 21:08     ` Maxime Ripard
2016-05-16 21:08       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 04/16] clk: sunxi-ng: Add gate " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 05/16] clk: sunxi-ng: Add mux " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-21 16:18   ` Chen-Yu Tsai
2016-05-21 16:18     ` Chen-Yu Tsai
2016-05-22 19:20     ` Maxime Ripard
2016-05-22 19:20       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 06/16] clk: sunxi-ng: Add divider table clock Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-21 16:30   ` Chen-Yu Tsai
2016-05-21 16:30     ` Chen-Yu Tsai
2016-05-08 20:01 ` [PATCH 07/16] clk: sunxi-ng: Add phase clock support Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-21 16:43   ` Chen-Yu Tsai
2016-05-21 16:43     ` Chen-Yu Tsai
2016-05-23 17:01     ` Maxime Ripard
2016-05-23 17:01       ` Maxime Ripard
2016-05-24  9:01       ` Chen-Yu Tsai
2016-05-24  9:01         ` Chen-Yu Tsai
2016-05-08 20:01 ` [PATCH 08/16] clk: sunxi-ng: Add M-factor " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-11  6:46   ` Jean-Francois Moine
2016-05-11  6:46     ` Jean-Francois Moine
2016-05-15 18:51     ` Maxime Ripard
2016-05-15 18:51       ` Maxime Ripard
2016-05-21 17:09   ` Chen-Yu Tsai
2016-05-21 17:09     ` Chen-Yu Tsai
2016-05-22 19:22     ` Maxime Ripard
2016-05-22 19:22       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 09/16] clk: sunxi-ng: Add P-factor " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 10/16] clk: sunxi-ng: Add M-P factor " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-23 13:45   ` Chen-Yu Tsai
2016-05-23 13:45     ` Chen-Yu Tsai
2016-05-23 17:18     ` Maxime Ripard
2016-05-23 17:18       ` Maxime Ripard
2016-05-24  4:14       ` Chen-Yu Tsai
2016-05-24  4:14         ` Chen-Yu Tsai
2016-05-24 21:07         ` Maxime Ripard
2016-05-24 21:07           ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 11/16] clk: sunxi-ng: Add N-K-factor " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-23 13:58   ` Chen-Yu Tsai
2016-05-23 13:58     ` Chen-Yu Tsai
2016-05-08 20:01 ` [PATCH 12/16] clk: sunxi-ng: Add N-M-factor " Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-09  7:24   ` Jean-Francois Moine
2016-05-09  7:24     ` Jean-Francois Moine
2016-05-15 19:04     ` Maxime Ripard
2016-05-15 19:04       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 13/16] clk: sunxi-ng: Add N-K-M Factor clock Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-11  8:45   ` Jean-Francois Moine
2016-05-11  8:45     ` Jean-Francois Moine
2016-05-15 19:08     ` Maxime Ripard
2016-05-15 19:08       ` Maxime Ripard
2016-05-23 14:10   ` Chen-Yu Tsai
2016-05-23 14:10     ` Chen-Yu Tsai
2016-05-08 20:01 ` [PATCH 14/16] clk: sunxi-ng: Add N-K-M-P factor clock Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-11  8:49   ` Jean-Francois Moine
2016-05-11  8:49     ` Jean-Francois Moine
2016-05-23 14:36   ` Chen-Yu Tsai
2016-05-23 14:36     ` Chen-Yu Tsai
2016-05-30  7:57     ` Maxime Ripard [this message]
2016-05-30  7:57       ` Maxime Ripard
2016-05-08 20:01 ` [PATCH 15/16] clk: sunxi-ng: Add H3 clocks Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard
2016-05-09  7:39   ` Jean-Francois Moine
2016-05-09  7:39     ` Jean-Francois Moine
2016-05-15 19:18     ` Maxime Ripard
2016-05-15 19:18       ` Maxime Ripard
2016-05-13  9:45   ` Jean-Francois Moine
2016-05-13  9:45     ` Jean-Francois Moine
2016-05-18 14:02     ` Maxime Ripard
2016-05-18 14:02       ` Maxime Ripard
2016-05-18 16:23       ` Jean-Francois Moine
2016-05-18 16:23         ` Jean-Francois Moine
2016-05-18 16:27       ` Jean-Francois Moine
2016-05-18 16:27         ` Jean-Francois Moine
2016-05-16 13:47   ` Jean-Francois Moine
2016-05-16 13:47     ` Jean-Francois Moine
2016-05-18 21:20     ` Maxime Ripard
2016-05-18 21:20       ` Maxime Ripard
2016-05-30 16:15   ` Chen-Yu Tsai
2016-05-30 16:15     ` Chen-Yu Tsai
2016-06-01 19:19     ` Maxime Ripard
2016-06-01 19:19       ` Maxime Ripard
2016-06-03  6:42       ` Chen-Yu Tsai
2016-06-03  6:42         ` Chen-Yu Tsai
2016-06-03  6:55         ` Chen-Yu Tsai
2016-06-03  6:55           ` Chen-Yu Tsai
2016-05-08 20:01 ` [PATCH 16/16] ARM: dt: sun8i: switch the H3 to the new CCU driver Maxime Ripard
2016-05-08 20:01   ` Maxime Ripard

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