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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Michael Turquette <mturquette@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Daniel Vetter <daniel.vetter@intel.com>,
	David Airlie <airlied@linux.ie>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH 01/20] clk: fixed-factor: Pass clk rates change to the parent
Date: Mon, 20 Jun 2016 10:54:58 +0200	[thread overview]
Message-ID: <20160620085458.GI26668@lukather> (raw)
In-Reply-To: <20160617230533.27203.82622@quark.deferred.io>

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On Fri, Jun 17, 2016 at 04:05:33PM -0700, Michael Turquette wrote:
> Quoting Maxime Ripard (2016-05-16 05:47:01)
> > A fixed factor clock, if it needs to change its rate, by definition do not
> > have any choice but to modify its parent rate.
> 
> Logically it makes sense to always propagate the rate-change request up
> to the parent for a fixed-factor clock if we desire to change its rate.
> However, I wonder if doing this for all users of fixed-factor-clock in
> DT is safe? Some users may be counting on it not changing.
> 
> There are 397 instances of fixed-factor-clock in .dts[i] today, so this
> change worries me a bit.

Understood.

> 
> > 
> > Add the CLK_SET_RATE_PARENT flag to that clock so that it can happen
> > 
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/clk-fixed-factor.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
> > index 75cd6c792cb8..3363abd9b4ae 100644
> > --- a/drivers/clk/clk-fixed-factor.c
> > +++ b/drivers/clk/clk-fixed-factor.c
> > @@ -167,7 +167,8 @@ void __init of_fixed_factor_clk_setup(struct device_node *node)
> >         of_property_read_string(node, "clock-output-names", &clk_name);
> >         parent_name = of_clk_get_parent_name(node, 0);
> >  
> > -       clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
> > +       clk = clk_register_fixed_factor(NULL, clk_name, parent_name,
> > +                                       CLK_SET_RATE_PARENT,
> 
> An alternative would be to pass in the flags you want, somehow. For the
> clock you are trying to fix, is it inside of the SoC or external? If it
> is internal, and part of a larger clock controller driver, is this for
> the legacy style allwinner clock drivers that put everything in DT?

It is :(

What we could do, is have an extra compatible for that clock (like
"allwinner,sun4i-a10-pll3-x2" in that case), and set the flag only for
that compatible.

Would that work for you?

> If not, it would better to initialize it statically and shove this
> flag into the struct clk_init_data storage.

Hopefully, yes, that should be addressed by the new framework, but I
need reviews to get it merged ;)

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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WARNING: multiple messages have this Message-ID (diff)
From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/20] clk: fixed-factor: Pass clk rates change to the parent
Date: Mon, 20 Jun 2016 10:54:58 +0200	[thread overview]
Message-ID: <20160620085458.GI26668@lukather> (raw)
In-Reply-To: <20160617230533.27203.82622@quark.deferred.io>

On Fri, Jun 17, 2016 at 04:05:33PM -0700, Michael Turquette wrote:
> Quoting Maxime Ripard (2016-05-16 05:47:01)
> > A fixed factor clock, if it needs to change its rate, by definition do not
> > have any choice but to modify its parent rate.
> 
> Logically it makes sense to always propagate the rate-change request up
> to the parent for a fixed-factor clock if we desire to change its rate.
> However, I wonder if doing this for all users of fixed-factor-clock in
> DT is safe? Some users may be counting on it not changing.
> 
> There are 397 instances of fixed-factor-clock in .dts[i] today, so this
> change worries me a bit.

Understood.

> 
> > 
> > Add the CLK_SET_RATE_PARENT flag to that clock so that it can happen
> > 
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/clk-fixed-factor.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
> > index 75cd6c792cb8..3363abd9b4ae 100644
> > --- a/drivers/clk/clk-fixed-factor.c
> > +++ b/drivers/clk/clk-fixed-factor.c
> > @@ -167,7 +167,8 @@ void __init of_fixed_factor_clk_setup(struct device_node *node)
> >         of_property_read_string(node, "clock-output-names", &clk_name);
> >         parent_name = of_clk_get_parent_name(node, 0);
> >  
> > -       clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
> > +       clk = clk_register_fixed_factor(NULL, clk_name, parent_name,
> > +                                       CLK_SET_RATE_PARENT,
> 
> An alternative would be to pass in the flags you want, somehow. For the
> clock you are trying to fix, is it inside of the SoC or external? If it
> is internal, and part of a larger clock controller driver, is this for
> the legacy style allwinner clock drivers that put everything in DT?

It is :(

What we could do, is have an extra compatible for that clock (like
"allwinner,sun4i-a10-pll3-x2" in that case), and set the flag only for
that compatible.

Would that work for you?

> If not, it would better to initialize it statically and shove this
> flag into the struct clk_init_data storage.

Hopefully, yes, that should be addressed by the new framework, but I
need reviews to get it merged ;)

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org, Stephen Boyd <sboyd@codeaurora.org>,
	dri-devel@lists.freedesktop.org, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Daniel Vetter <daniel.vetter@intel.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 01/20] clk: fixed-factor: Pass clk rates change to the parent
Date: Mon, 20 Jun 2016 10:54:58 +0200	[thread overview]
Message-ID: <20160620085458.GI26668@lukather> (raw)
In-Reply-To: <20160617230533.27203.82622@quark.deferred.io>


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On Fri, Jun 17, 2016 at 04:05:33PM -0700, Michael Turquette wrote:
> Quoting Maxime Ripard (2016-05-16 05:47:01)
> > A fixed factor clock, if it needs to change its rate, by definition do not
> > have any choice but to modify its parent rate.
> 
> Logically it makes sense to always propagate the rate-change request up
> to the parent for a fixed-factor clock if we desire to change its rate.
> However, I wonder if doing this for all users of fixed-factor-clock in
> DT is safe? Some users may be counting on it not changing.
> 
> There are 397 instances of fixed-factor-clock in .dts[i] today, so this
> change worries me a bit.

Understood.

> 
> > 
> > Add the CLK_SET_RATE_PARENT flag to that clock so that it can happen
> > 
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > ---
> >  drivers/clk/clk-fixed-factor.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
> > index 75cd6c792cb8..3363abd9b4ae 100644
> > --- a/drivers/clk/clk-fixed-factor.c
> > +++ b/drivers/clk/clk-fixed-factor.c
> > @@ -167,7 +167,8 @@ void __init of_fixed_factor_clk_setup(struct device_node *node)
> >         of_property_read_string(node, "clock-output-names", &clk_name);
> >         parent_name = of_clk_get_parent_name(node, 0);
> >  
> > -       clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
> > +       clk = clk_register_fixed_factor(NULL, clk_name, parent_name,
> > +                                       CLK_SET_RATE_PARENT,
> 
> An alternative would be to pass in the flags you want, somehow. For the
> clock you are trying to fix, is it inside of the SoC or external? If it
> is internal, and part of a larger clock controller driver, is this for
> the legacy style allwinner clock drivers that put everything in DT?

It is :(

What we could do, is have an extra compatible for that clock (like
"allwinner,sun4i-a10-pll3-x2" in that case), and set the flag only for
that compatible.

Would that work for you?

> If not, it would better to initialize it statically and shove this
> flag into the struct clk_init_data storage.

Hopefully, yes, that should be addressed by the new framework, but I
need reviews to get it merged ;)

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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_______________________________________________
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  reply	other threads:[~2016-06-20  8:54 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-16 12:47 [PATCH 00/20] drm: Add Support for Passive RGB to VGA bridges Maxime Ripard
2016-05-16 12:47 ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 01/20] clk: fixed-factor: Pass clk rates change to the parent Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-06-10 12:30   ` Maxime Ripard
2016-06-10 12:30     ` Maxime Ripard
2016-06-17 23:05   ` Michael Turquette
2016-06-17 23:05     ` Michael Turquette
2016-06-17 23:05     ` Michael Turquette
2016-06-20  8:54     ` Maxime Ripard [this message]
2016-06-20  8:54       ` Maxime Ripard
2016-06-20  8:54       ` Maxime Ripard
2016-06-20 19:57       ` Michael Turquette
2016-06-20 19:57         ` Michael Turquette
2016-06-20 19:57         ` Michael Turquette
2016-05-16 12:47 ` [PATCH 02/20] clk: multiplier: Prevent the multiplier from under / over flowing Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-06-10 12:31   ` Maxime Ripard
2016-06-10 12:31     ` Maxime Ripard
2016-06-20 20:50   ` Michael Turquette
2016-06-20 20:50     ` Michael Turquette
2016-06-20 20:50     ` Michael Turquette
2016-06-21  9:20     ` Maxime Ripard
2016-06-21  9:20       ` Maxime Ripard
2016-06-21  9:20       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 03/20] clk: sunxi: tcon-ch1: Do not return a negative error in get_parent Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 16:05   ` Chen-Yu Tsai
2016-05-16 16:05     ` Chen-Yu Tsai
2016-06-10  9:50     ` Maxime Ripard
2016-06-10  9:50       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 04/20] clk: sunxi: display: Add per-clock flags Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 15:21   ` Chen-Yu Tsai
2016-05-16 15:21     ` Chen-Yu Tsai
2016-06-10  9:50     ` Maxime Ripard
2016-06-10  9:50       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 05/20] drm/sun4i: request exact rates to our parents Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 06/20] drm/sun4i: allow dclk to modify its parent rate Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 17:18   ` Chen-Yu Tsai
2016-05-16 17:18     ` Chen-Yu Tsai
2016-05-25 12:01     ` Maxime Ripard
2016-05-25 12:01       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 07/20] drm/sun4i: rgb: Validate the clock rate Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 08/20] drm/sun4i: rgb: panel is an error pointer Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-17  3:51   ` Chen-Yu Tsai
2016-05-17  3:51     ` Chen-Yu Tsai
2016-05-25 12:06     ` Maxime Ripard
2016-05-25 12:06       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 09/20] drm/sun4i: defer only if we didn't find our panel Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-17  3:52   ` Chen-Yu Tsai
2016-05-17  3:52     ` Chen-Yu Tsai
2016-05-17  3:52     ` Chen-Yu Tsai
2016-05-25 12:09     ` Maxime Ripard
2016-05-25 12:09       ` Maxime Ripard
2016-05-25 12:09       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 10/20] drm/sun4i: remove simplefb at probe Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 11/20] drm/sun4i: Convert to connector register helpers Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 12/20] drm/sun4i: Add bridge support Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 13:12   ` Daniel Vetter
2016-05-16 13:12     ` Daniel Vetter
2016-05-25 16:29     ` Maxime Ripard
2016-05-25 16:29       ` Maxime Ripard
2016-05-25 16:29       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 13/20] drm/bridge: Add RGB to VGA " Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 13:24   ` Laurent Pinchart
2016-05-16 13:24     ` Laurent Pinchart
2016-05-16 13:24     ` Laurent Pinchart
2016-05-26  8:53     ` Maxime Ripard
2016-05-26  8:53       ` Maxime Ripard
2016-05-26  9:16       ` Russell King - ARM Linux
2016-05-26  9:16         ` Russell King - ARM Linux
2016-05-16 14:07   ` Rob Herring
2016-05-16 14:07     ` Rob Herring
2016-05-16 14:07     ` Rob Herring
2016-05-26  9:38     ` Maxime Ripard
2016-05-26  9:38       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 14/20] ARM: sun5i: a13: Add LCD pins Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 17:13   ` Chen-Yu Tsai
2016-05-16 17:13     ` Chen-Yu Tsai
2016-05-25 12:33     ` Maxime Ripard
2016-05-25 12:33       ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 15/20] ARM: sun5i: Move display blocks to A13 Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 16/20] ARM: sun5i: a13-olinuxino: Enable VGA bridge Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 17/20] ARM: multi_v7: Enable sun4i DRM driver Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-17  3:36   ` Chen-Yu Tsai
2016-05-17  3:36     ` Chen-Yu Tsai
2016-05-16 12:47 ` [PATCH 18/20] ARM: multi_v7: enable VGA bridge Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47 ` [PATCH 19/20] ARM: sunxi: Enable sun4i DRM driver Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 15:01   ` Chen-Yu Tsai
2016-05-16 15:01     ` Chen-Yu Tsai
2016-05-16 12:47 ` [PATCH 20/20] ARM: sunxi: Enable VGA bridge Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard
2016-05-16 12:47   ` Maxime Ripard

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