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From: Oliver Graute <oliver.graute@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Sascha Hauer <s.hauer@pengutronix.de>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	netdev@vger.kernel.org, f.fainelli@gmail.com, johan@kernel.org,
	bth@kamstrup.dk
Subject: Re: Micrel Phy KSZ8031 clock select setting in dts
Date: Mon, 20 Jun 2016 19:14:06 +0200	[thread overview]
Message-ID: <20160620171406.GA4455@graute-opti> (raw)
In-Reply-To: <20160620124539.GB20362@lunn.ch>

On 20/06/16, Andrew Lunn wrote:
> > &fec1 {
> > 	pinctrl-names = "default";
> > 	pinctrl-0 = <&pinctrl_enet1>;
> > 	phy-mode = "rmii";
> > 	micrel,rmii-reference-clock-select-25-mhz;
> > 	clocks,rmii-ref;
> 
> You are adding phy properties, not MAC properties. Please put them in
> the phy node.

yes, you are right. I fixed this and added the clock like sascha and
sergei proposed. (thx to you all)

my dts node now looks like this:

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rmii";
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "micrel,ksz8031";
			micrel,rmii-reference-clock-select-25-mhz;
			clocks = <&mdc>;
			clock-names = "rmii-ref";
			phy-handle = <&ethphy0>;
			reg = <0>;
		};

	};

	mdc: rmii-ref {
		#clock-cells = <0>;
		compatible ="fixed-clock";
		clock-frequency = <50000000>;
	};
};


But I also needed to invert the behavior of KSZPHY_RMII_REF_CLK_SEL in
the micrel.c driver to get everything working with my revison of Micrel Phy.

If I understood you right this should not be necessary. So something in
dts is still wrong.


diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 7f4e042..198a24f 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -181,10 +181,14 @@ static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val)
 		return ctrl;
 	}
 
-	if (val)
+	if (val){
+		printk(KERN_DEBUG "if kszphy_rmii_clk_sel val=0x%x \n", val);
 		ctrl |= KSZPHY_RMII_REF_CLK_SEL;
-	else
-		ctrl &= ~KSZPHY_RMII_REF_CLK_SEL;
+	}
+	else{
+		printk(KERN_DEBUG "else kszphy_rmii_clk_sel val=0x%x \n", val);
+		ctrl |= KSZPHY_RMII_REF_CLK_SEL;
+	}

Best Regards,

Oliver

  reply	other threads:[~2016-06-20 17:15 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-17 13:04 Micrel Phy KSZ8031 clock select setting in dts Oliver Graute
2016-06-17 13:48 ` Sergei Shtylyov
2016-06-19 19:29   ` Oliver Graute
2016-06-20  6:21     ` Sascha Hauer
2016-06-20 12:08       ` Oliver Graute
2016-06-20 12:45         ` Andrew Lunn
2016-06-20 17:14           ` Oliver Graute [this message]
2016-06-21  6:16             ` Sascha Hauer
2016-06-22  8:18               ` Oliver Graute
2016-06-20 12:56         ` Sergei Shtylyov
2016-06-20 13:12           ` Sascha Hauer

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