From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 0/6] Runtime pagesize computation
Date: Wed, 22 Jun 2016 12:43:17 +0100 [thread overview]
Message-ID: <20160622114317.GG2274@work-vm> (raw)
In-Reply-To: <1466528974-12183-1-git-send-email-peter.maydell@linaro.org>
* Peter Maydell (peter.maydell@linaro.org) wrote:
> This set of patches is a development based on the ones from Vijaya:
> the general idea is similar but I have tried to improve the interface
> for defining the page size a bit. I've also tweaked patches 2 and 3
> to address code review comments.
>
> The basic idea here is that:
> * the target CPU implementation has to opt into variable page size
> by defining TARGET_PAGE_BITS_VARY, and then calling
> set_preferred_target_page_bits() in its realize function
> with whatever the CPU as instantiated actually requires
> * the machine also has to opt in, by specifying a new MachineClass
> field which states the value they guarantee will be no greater
> than the preferred page size for any CPU they create
> * we finalize the decision about page size in cpu_exec_init_all()
> (and then later attempts to create CPUs which can't cope with
> that decision are failed)
>
> I would ideally have liked to finalize things much later, but
> this is in practice hugely difficult because so many things
> (in particular all the address space/memory system code)
> assume the target page size is known.
>
> Note that setting minimum_page-bits for a machine is a migration
> compatibility break (the RAM migration format assumes both sides
> have the same idea of a page size). Mismatches will probably
> result in an unhelpfully obscure migration failure. (Possibly we
> could have the migration send the page size if it was different
> from TARGET_PAGE_BITS_MIN so we at least got a nice error?)
Yes, that would be a good idea; how about adding it as a subsection
in the vmstate_configuration (migration/savevm.c); if you only
send it in the case where it's not the existing size then it shouldn't
break any old formats. That configuration block gets loaded
very early.
Dave
>
> This could in theory be extended to the user-mode binaries,
> but for the moment I have just required them to define a
> fixed TARGET_PAGE_BITS.
>
> NB: I have only very lightly tested these and haven't attempted
> to measure performance at all. There is an assert() in the
> definition of TARGET_PAGE_BITS which is good for making sure
> it isn't used before it's valid but not so good for speed.
>
> thanks
> -- PMM
>
>
> Peter Maydell (3):
> cpu: Support a target CPU having a variable page size
> target-arm: Make page size a runtime setting
> hw/arm/virt: Set minimum_page_bits to 12
>
> Vijaya Kumar K (3):
> migration: Remove static allocation of xzblre cache buffer
> exec.c: Remove static allocation of sub_section of sub_page
> translate-all.c: Compute L1 page table properties at runtime
>
> exec.c | 47 ++++++++++++++++++++++++++++++++---
> hw/arm/virt.c | 2 ++
> include/exec/cpu-all.h | 8 ++++++
> include/hw/boards.h | 7 ++++++
> include/qemu-common.h | 13 ++++++++++
> migration/ram.c | 4 ++-
> target-arm/cpu.c | 24 ++++++++++++++++++
> target-arm/cpu.h | 9 ++++---
> translate-all.c | 67 +++++++++++++++++++++++++++++++++-----------------
> vl.c | 10 ++++++++
> 10 files changed, 160 insertions(+), 31 deletions(-)
>
> --
> 1.9.1
>
>
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
WARNING: multiple messages have this Message-ID (diff)
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Paolo Bonzini <pbonzini@redhat.com>,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 0/6] Runtime pagesize computation
Date: Wed, 22 Jun 2016 12:43:17 +0100 [thread overview]
Message-ID: <20160622114317.GG2274@work-vm> (raw)
In-Reply-To: <1466528974-12183-1-git-send-email-peter.maydell@linaro.org>
* Peter Maydell (peter.maydell@linaro.org) wrote:
> This set of patches is a development based on the ones from Vijaya:
> the general idea is similar but I have tried to improve the interface
> for defining the page size a bit. I've also tweaked patches 2 and 3
> to address code review comments.
>
> The basic idea here is that:
> * the target CPU implementation has to opt into variable page size
> by defining TARGET_PAGE_BITS_VARY, and then calling
> set_preferred_target_page_bits() in its realize function
> with whatever the CPU as instantiated actually requires
> * the machine also has to opt in, by specifying a new MachineClass
> field which states the value they guarantee will be no greater
> than the preferred page size for any CPU they create
> * we finalize the decision about page size in cpu_exec_init_all()
> (and then later attempts to create CPUs which can't cope with
> that decision are failed)
>
> I would ideally have liked to finalize things much later, but
> this is in practice hugely difficult because so many things
> (in particular all the address space/memory system code)
> assume the target page size is known.
>
> Note that setting minimum_page-bits for a machine is a migration
> compatibility break (the RAM migration format assumes both sides
> have the same idea of a page size). Mismatches will probably
> result in an unhelpfully obscure migration failure. (Possibly we
> could have the migration send the page size if it was different
> from TARGET_PAGE_BITS_MIN so we at least got a nice error?)
Yes, that would be a good idea; how about adding it as a subsection
in the vmstate_configuration (migration/savevm.c); if you only
send it in the case where it's not the existing size then it shouldn't
break any old formats. That configuration block gets loaded
very early.
Dave
>
> This could in theory be extended to the user-mode binaries,
> but for the moment I have just required them to define a
> fixed TARGET_PAGE_BITS.
>
> NB: I have only very lightly tested these and haven't attempted
> to measure performance at all. There is an assert() in the
> definition of TARGET_PAGE_BITS which is good for making sure
> it isn't used before it's valid but not so good for speed.
>
> thanks
> -- PMM
>
>
> Peter Maydell (3):
> cpu: Support a target CPU having a variable page size
> target-arm: Make page size a runtime setting
> hw/arm/virt: Set minimum_page_bits to 12
>
> Vijaya Kumar K (3):
> migration: Remove static allocation of xzblre cache buffer
> exec.c: Remove static allocation of sub_section of sub_page
> translate-all.c: Compute L1 page table properties at runtime
>
> exec.c | 47 ++++++++++++++++++++++++++++++++---
> hw/arm/virt.c | 2 ++
> include/exec/cpu-all.h | 8 ++++++
> include/hw/boards.h | 7 ++++++
> include/qemu-common.h | 13 ++++++++++
> migration/ram.c | 4 ++-
> target-arm/cpu.c | 24 ++++++++++++++++++
> target-arm/cpu.h | 9 ++++---
> translate-all.c | 67 +++++++++++++++++++++++++++++++++-----------------
> vl.c | 10 ++++++++
> 10 files changed, 160 insertions(+), 31 deletions(-)
>
> --
> 1.9.1
>
>
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
next prev parent reply other threads:[~2016-06-22 11:45 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-21 17:09 [Qemu-arm] [PATCH v2 0/6] Runtime pagesize computation Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 1/6] migration: Remove static allocation of xzblre cache buffer Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-22 1:44 ` [Qemu-arm] " Richard Henderson
2016-06-22 1:44 ` Richard Henderson
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 2/6] exec.c: Remove static allocation of sub_section of sub_page Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-22 1:47 ` [Qemu-arm] " Richard Henderson
2016-06-22 1:47 ` Richard Henderson
[not found] ` <BY1PR0701MB169163D3032F7EF4FB8FD000F22C0@BY1PR0701MB1691.namprd07.prod.outlook.com>
2016-06-22 6:55 ` [Qemu-arm] Fw: " Vijay Kilari
2016-06-22 6:55 ` [Qemu-devel] Fw: [Qemu-arm] " Vijay Kilari
2016-06-22 7:07 ` [Qemu-arm] [Qemu-devel] Fw: " Richard Henderson
2016-06-22 7:07 ` [Qemu-devel] Fw: [Qemu-arm] " Richard Henderson
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 3/6] translate-all.c: Compute L1 page table properties at runtime Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-22 6:56 ` Richard Henderson
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 4/6] cpu: Support a target CPU having a variable page size Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-21 18:26 ` [Qemu-arm] " Andrew Jones
2016-06-21 18:26 ` Andrew Jones
2016-06-21 19:46 ` [Qemu-arm] " Peter Maydell
2016-06-21 19:46 ` Peter Maydell
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 5/6] target-arm: Make page size a runtime setting Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-21 17:09 ` [Qemu-arm] [PATCH v2 6/6] hw/arm/virt: Set minimum_page_bits to 12 Peter Maydell
2016-06-21 17:09 ` [Qemu-devel] " Peter Maydell
2016-06-21 18:45 ` [Qemu-arm] " Andrew Jones
2016-06-21 18:45 ` Andrew Jones
2016-06-21 19:47 ` [Qemu-arm] " Peter Maydell
2016-06-21 19:47 ` Peter Maydell
2016-06-22 8:02 ` Andrew Jones
2016-06-22 8:02 ` Andrew Jones
2016-06-22 11:35 ` Dr. David Alan Gilbert
2016-06-22 11:38 ` [Qemu-arm] " Peter Maydell
2016-06-22 11:38 ` Peter Maydell
2016-06-22 11:54 ` Dr. David Alan Gilbert
2016-06-22 12:02 ` [Qemu-arm] " Peter Maydell
2016-06-22 12:02 ` Peter Maydell
2016-06-22 12:17 ` Dr. David Alan Gilbert
2016-06-22 12:18 ` [Qemu-arm] " Andrew Jones
2016-06-22 12:18 ` Andrew Jones
2016-06-22 10:24 ` [Qemu-arm] " Paolo Bonzini
2016-06-22 10:24 ` Paolo Bonzini
2016-06-22 11:43 ` Dr. David Alan Gilbert [this message]
2016-06-22 11:43 ` [Qemu-devel] [PATCH v2 0/6] Runtime pagesize computation Dr. David Alan Gilbert
2016-06-28 8:16 ` [Qemu-arm] " Peter Maydell
2016-06-28 8:16 ` [Qemu-devel] " Peter Maydell
[not found] ` <BLUPR0701MB1684CF1920D922BD00E93EE6F2230@BLUPR0701MB1684.namprd07.prod.outlook.com>
2016-06-29 7:00 ` [Qemu-arm] Fw: " Vijay Kilari
2016-06-29 7:00 ` [Qemu-devel] Fw: [Qemu-arm] " Vijay Kilari
2016-07-19 11:01 ` [Qemu-arm] Fw: " Vijay Kilari
2016-07-19 11:01 ` [Qemu-devel] Fw: [Qemu-arm] " Vijay Kilari
2016-07-19 11:04 ` [Qemu-arm] Fw: " Peter Maydell
2016-07-19 11:04 ` [Qemu-devel] Fw: [Qemu-arm] " Peter Maydell
2016-10-07 14:20 ` Peter Maydell
2016-10-07 14:20 ` Peter Maydell
2016-10-08 4:26 ` [Qemu-arm] Fw: " Vijay Kilari
2016-10-08 4:26 ` [Qemu-devel] Fw: [Qemu-arm] " Vijay Kilari
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