All of lore.kernel.org
 help / color / mirror / Atom feed
From: Peter Xu <peterx@redhat.com>
To: Jan Kiszka <jan.kiszka@web.de>
Cc: qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net,
	ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com,
	mst@redhat.com, pbonzini@redhat.com, rkrcmar@redhat.com,
	alex.williamson@redhat.com, wexu@redhat.com,
	davidkiarie4@gmail.com,
	Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v10 16/26] intel_iommu: add support for split irqchip
Date: Sat, 25 Jun 2016 21:18:54 +0800	[thread overview]
Message-ID: <20160625131854.GA16629@pxdev.xzpeter.org> (raw)
In-Reply-To: <576E3BEA.5010400@web.de>

On Sat, Jun 25, 2016 at 10:08:10AM +0200, Jan Kiszka wrote:

[...]

> For successful remappings, this is fine - it just caches the result in
> an interrupt route. But what will happen with invalid interrupts?
> 
> My current understanding is that, because the translation happens on
> activation of that interrupt source, not on actual signalling, the IOMMU
> will report an error too early and none when the interrupt is actually
> sent. That will lead to unwanted results, in the worst case
> false-positiv IR error reports to the guest, no?
> 
> I think we need to do this:
> - silently remap broken sources to an error sink
> - hook up the error sink with the actual IOMMU model (Intel or AMD)
> - when that source actually fires, let the sink report an IR
>   translation error to the guest
> 
> Am I right?

Right. I totally missed this one. :(

Currently when split irqchip is specified, IOAPIC interrupts are
cached in kernel with type KVM_IRQ_ROUTING_MSI (which is the same as
irqfds). When guest specify a fault interrupt entry, it is possible
that we silently fail the update, and all further interrupts are still
the old and correct one.

I agree with your solution on this. First of all we update the
interrupt even if it's faulty, but we should mark it out. After that,
we should fire QEMU from kernel side when the fault interrupt is
triggered, so that QEMU IOMMU can still generate corresponding fault
report interrupt to guest (though for Intel IOMMU IR, we still haven't
handled any fault report yet, but we should be prepared for it).

So it seems that finally we cannot avoid touching KVM this time.

I have a thought on how to implement the "sink" you have mentioned:

First of all, in KVM, we provide a new KVM_IRQ_ROUTING_* type, maybe
called:

  KVM_IRQ_ROUTING_EVENTFD

When KVM got this kind of interrupt, KVM does not trigger any real
interrupt to guest. Instead, it just do eventfd_signal() to a
pre-defined fd (maybe also with some data along with the notification,
so that we can put the error inside?), which is set during
KVM_SET_GSI_ROUTING ioctl().

After that, QEMU register all fault interrupts using this new
KVM_IRQ_ROUTING_EVENTFD type (rather than original
KVM_IRQ_ROUTING_MSI), assign a specific handler to handle the events
from these interrupts, and trigger IOMMU fault report path in that
handler.

(Here I used KVM_IRQ_ROUTING_EVENTFD rather than something like
 KVM_IRQ_ROUTING_FAULT_MSI to make the API a more general one, in case
 we can leverage it in other cases in the future)

Do you think the above workable?

No matter which solution we will have, I would still suggest we add
this as an "enhancement" after this series, since:

- there are works that depend on this series, so I would appreciate if
  this series can be merged first, so that other people can have a
  good basement (Radim's x2apic, David's AMD IOMMU). Though this is
  based on the assumption that the basic design of this series is
  workable...

- this problem will only exist for guest driver developers and should
  not happen for generic users (right?), so only a small subset of
  users might be affected.

Thanks,

-- peterx

  reply	other threads:[~2016-06-25 13:19 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-21  7:47 [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 01/26] x86-iommu: introduce parent class Peter Xu
2016-06-24  7:10   ` [Qemu-devel] [PATCH v10 27/26] intel_iommu: disallow kernel-irqchip=on with IR Peter Xu
2016-06-24  9:20     ` Peter Xu
2016-07-04 15:39       ` Michael S. Tsirkin
2016-07-05  3:51         ` Peter Xu
2016-07-11 10:17     ` David Kiarie
2016-07-11 12:08       ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 02/26] x86-iommu: provide x86_iommu_get_default Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-05  5:11     ` Peter Xu
2016-07-04 15:17   ` Michael S. Tsirkin
2016-07-05  5:12     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 03/26] x86-iommu: q35: generalize find_add_as() Peter Xu
2016-07-04 15:16   ` Michael S. Tsirkin
2016-07-04 16:08     ` Paolo Bonzini
2016-07-04 16:35       ` Michael S. Tsirkin
2016-07-04 16:40         ` Paolo Bonzini
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 04/26] x86-iommu: introduce "intremap" property Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 05/26] acpi: enable INTR for DMAR report structure Peter Xu
2016-07-04 15:14   ` Michael S. Tsirkin
2016-07-05  6:39     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 06/26] intel_iommu: allow queued invalidation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 07/26] intel_iommu: set IR bit for ECAP register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 08/26] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-07-04 15:22   ` Michael S. Tsirkin
2016-07-05  7:30     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 09/26] intel_iommu: define interrupt remap table addr register Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 10/26] intel_iommu: handle interrupt remap enable Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 11/26] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 12/26] intel_iommu: add IR translation faults defines Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 13/26] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 14/26] q35: ioapic: add support for emulated IOAPIC IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 15/26] ioapic: introduce ioapic_entry_parse() helper Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 16/26] intel_iommu: add support for split irqchip Peter Xu
2016-06-25  8:08   ` Jan Kiszka
2016-06-25 13:18     ` Peter Xu [this message]
2016-06-25 15:18       ` Jan Kiszka
2016-06-26  1:48         ` Peter Xu
2016-06-26 13:27           ` Jan Kiszka
2016-06-28  6:10             ` Michael S. Tsirkin
2016-06-28  7:25             ` Peter Xu
2017-01-03  6:15             ` Peter Xu
2017-01-04 10:33               ` Jan Kiszka
2017-01-05  2:21                 ` Peter Xu
2016-07-04 14:32   ` Paolo Bonzini
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 17/26] x86-iommu: introduce IEC notifiers Peter Xu
2016-07-04 14:22   ` Paolo Bonzini
2016-07-05  7:32     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 18/26] ioapic: register IOMMU IEC notifier for ioapic Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 19/26] intel_iommu: Add support for Extended Interrupt Mode Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 20/26] intel_iommu: add SID validation for IR Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 21/26] kvm-irqchip: simplify kvm_irqchip_add_msi_route Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 22/26] kvm-irqchip: i386: add hook for add/remove virq Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 23/26] kvm-irqchip: x86: add msi route notify fn Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Peter Xu
2016-06-22  3:42   ` [Qemu-devel] [PATCH v10.2 24/26] kvm-irqchip: introduce kvm_irqchip_update_msi_route_no_commit Peter Xu
2016-07-04 14:23   ` [Qemu-devel] [PATCH v10 24/26] kvm-irqchip: do explicit commit when update irq Paolo Bonzini
2016-07-05  7:35     ` Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 25/26] intel_iommu: support all masks in interrupt entry cache invalidation Peter Xu
2016-06-21  7:47 ` [Qemu-devel] [PATCH v10 26/26] kvm-all: add trace events for kvm irqchip ops Peter Xu
2016-07-04 14:33 ` [Qemu-devel] [PATCH v10 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU Paolo Bonzini
2016-07-04 16:39 ` Michael S. Tsirkin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160625131854.GA16629@pxdev.xzpeter.org \
    --to=peterx@redhat.com \
    --cc=alex.williamson@redhat.com \
    --cc=davidkiarie4@gmail.com \
    --cc=ehabkost@redhat.com \
    --cc=imammedo@redhat.com \
    --cc=jan.kiszka@web.de \
    --cc=jasowang@redhat.com \
    --cc=marcel@redhat.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rkrcmar@redhat.com \
    --cc=rth@twiddle.net \
    --cc=valentine.sinitsyn@gmail.com \
    --cc=wexu@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.