From: alexandre.belloni@free-electrons.com (Alexandre Belloni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node
Date: Mon, 4 Jul 2016 18:02:03 +0200 [thread overview]
Message-ID: <20160704160203.GJ20045@piout.net> (raw)
In-Reply-To: <CALdGsk+rSYukvo6-zqgqNTwJnf8QXu2bCSAdurpg1=BVtENZvw@mail.gmail.com>
On 04/07/2016 at 11:08:42 +0200, Olivier Schonken wrote :
> That is the dilemma I face with the structure. What is the least
> invasive option to include the coresight functionality, without
> breaking the amba probe for other architectures that rely on it having
> a clock to enable/disable, and not break the processor startup by
> messing with stable clocks for the sake of giving the ETB/ETM a clock
> it doesn't need.
> That is why in the end I decided on a dummy clock driver. To keep
> with the convention of having a clock specific to the ETM, and leaving
> the rest of the clocks as is.
>
Well, the issue is in the pit driver, see the patch I just sent. With
both of your patches, I got my sama5d2 xplained botting fine.
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-07-04 16:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 14:37 [PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID Olivier Schonken
2016-07-01 14:37 ` [PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node Olivier Schonken
2016-07-01 18:32 ` Alexandre Belloni
2016-07-01 20:07 ` Olivier Schonken
2016-07-02 18:46 ` Boris Brezillon
2016-07-04 8:49 ` Olivier Schonken
[not found] ` <CALdGsk+RO_cxfcTLVyKHP3aVMkSTtzEzQXz2G4ARX7vqxRazSA@mail.gmail.com>
2016-07-04 9:00 ` Boris Brezillon
2016-07-04 9:08 ` Olivier Schonken
2016-07-04 16:02 ` Alexandre Belloni [this message]
2016-07-04 20:26 ` Boris Brezillon
2016-07-04 20:47 ` Alexandre Belloni
2016-07-04 20:51 ` Boris Brezillon
2016-07-04 15:38 ` Mathieu Poirier
2016-07-04 15:33 ` [PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID Mathieu Poirier
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