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From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	cf-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	David Wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
	Brian Norris
	<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Wed, 6 Jul 2016 11:39:52 +0100	[thread overview]
Message-ID: <20160706103951.GC17925@arm.com> (raw)
In-Reply-To: <1467379291-18413-1-git-send-email-marc.zyngier-5wv7dgnIgG8@public.gmane.org>

On Fri, Jul 01, 2016 at 02:21:31PM +0100, Marc Zyngier wrote:
> On a big-little system, PMUs can be wired to CPUs using per CPU
> interrups (PPI). In this case, it is important to make sure that
> the enable/disable do happen on the right set of CPUs.
> 
> So instead of relying on the interrupt-affinity property, we can
> use the actual percpu affinity that DT exposes as part of the
> interrupt specifier. The DT binding is also updated to reflect
> the fact that the interrupt-affinity property shouldn't be used
> in that case.

[...]

> -	/* If we didn't manage to parse anything, claim to support all CPUs */
> -	if (cpumask_weight(&pmu->supported_cpus) == 0)
> -		cpumask_setall(&pmu->supported_cpus);
> +	/* If we didn't manage to parse anything, try the interrupt affinity */
> +	if (cpumask_weight(&pmu->supported_cpus) == 0) {
> +		if (!using_spi) {
> +			/* If using PPIs, check the affinity of the partition */
> +			int irq = platform_get_irq(pdev, 0);
> +			irq_get_percpu_devid_partition(irq,
> +						       &pmu->supported_cpus);

Should we not at least propagate the failure if this returns -EINVAL?

Will
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WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Wed, 6 Jul 2016 11:39:52 +0100	[thread overview]
Message-ID: <20160706103951.GC17925@arm.com> (raw)
In-Reply-To: <1467379291-18413-1-git-send-email-marc.zyngier@arm.com>

On Fri, Jul 01, 2016 at 02:21:31PM +0100, Marc Zyngier wrote:
> On a big-little system, PMUs can be wired to CPUs using per CPU
> interrups (PPI). In this case, it is important to make sure that
> the enable/disable do happen on the right set of CPUs.
> 
> So instead of relying on the interrupt-affinity property, we can
> use the actual percpu affinity that DT exposes as part of the
> interrupt specifier. The DT binding is also updated to reflect
> the fact that the interrupt-affinity property shouldn't be used
> in that case.

[...]

> -	/* If we didn't manage to parse anything, claim to support all CPUs */
> -	if (cpumask_weight(&pmu->supported_cpus) == 0)
> -		cpumask_setall(&pmu->supported_cpus);
> +	/* If we didn't manage to parse anything, try the interrupt affinity */
> +	if (cpumask_weight(&pmu->supported_cpus) == 0) {
> +		if (!using_spi) {
> +			/* If using PPIs, check the affinity of the partition */
> +			int irq = platform_get_irq(pdev, 0);
> +			irq_get_percpu_devid_partition(irq,
> +						       &pmu->supported_cpus);

Should we not at least propagate the failure if this returns -EINVAL?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Heiko Stuebner <heiko@sntech.de>,
	cf@rock-chips.com, huangtao@rock-chips.com,
	jay.xu@rock-chips.com, Caesar Wang <wxt@rock-chips.com>,
	David Wu <david.wu@rock-chips.com>,
	Brian Norris <briannorris@chromium.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Wed, 6 Jul 2016 11:39:52 +0100	[thread overview]
Message-ID: <20160706103951.GC17925@arm.com> (raw)
In-Reply-To: <1467379291-18413-1-git-send-email-marc.zyngier@arm.com>

On Fri, Jul 01, 2016 at 02:21:31PM +0100, Marc Zyngier wrote:
> On a big-little system, PMUs can be wired to CPUs using per CPU
> interrups (PPI). In this case, it is important to make sure that
> the enable/disable do happen on the right set of CPUs.
> 
> So instead of relying on the interrupt-affinity property, we can
> use the actual percpu affinity that DT exposes as part of the
> interrupt specifier. The DT binding is also updated to reflect
> the fact that the interrupt-affinity property shouldn't be used
> in that case.

[...]

> -	/* If we didn't manage to parse anything, claim to support all CPUs */
> -	if (cpumask_weight(&pmu->supported_cpus) == 0)
> -		cpumask_setall(&pmu->supported_cpus);
> +	/* If we didn't manage to parse anything, try the interrupt affinity */
> +	if (cpumask_weight(&pmu->supported_cpus) == 0) {
> +		if (!using_spi) {
> +			/* If using PPIs, check the affinity of the partition */
> +			int irq = platform_get_irq(pdev, 0);
> +			irq_get_percpu_devid_partition(irq,
> +						       &pmu->supported_cpus);

Should we not at least propagate the failure if this returns -EINVAL?

Will

  parent reply	other threads:[~2016-07-06 10:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-01 13:21 [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask Marc Zyngier
2016-07-01 13:21 ` Marc Zyngier
2016-07-01 13:21 ` Marc Zyngier
2016-07-01 15:00 ` Caesar Wang
2016-07-01 15:00   ` Caesar Wang
2016-07-05 14:23 ` Rob Herring
2016-07-05 14:23   ` Rob Herring
     [not found] ` <1467379291-18413-1-git-send-email-marc.zyngier-5wv7dgnIgG8@public.gmane.org>
2016-07-06 10:39   ` Will Deacon [this message]
2016-07-06 10:39     ` Will Deacon
2016-07-06 10:39     ` Will Deacon
2016-07-06 14:11     ` Marc Zyngier
2016-07-06 14:11       ` Marc Zyngier

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