* [PATCH v2] x86: add workaround monitor bug
@ 2016-07-18 18:41 Jacob Pan
2016-07-18 18:49 ` Brian Gerst
2016-07-20 10:40 ` [tip:x86/cpu] x86/cpu: Add workaround for MONITOR instruction erratum on Goldmont based CPUs tip-bot for Peter Zijlstra
0 siblings, 2 replies; 4+ messages in thread
From: Jacob Pan @ 2016-07-18 18:41 UTC (permalink / raw)
To: LKML, Peter Zijlstra, Ingo Molnar, H. Peter Anvin, X86 Kernel
Cc: Arjan van de Ven, Len Brown, Jacob Pan
From: Peter Zijlstra <peterz@infradead.org>
Monitored cached line may not wake up from mwait on certain
Goldmont based CPUs. This patch will avoid calling
current_set_polling_and_test() and thereby not set the TIF_ flag.
The result is that we'll always send IPIs for wakeups.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/include/asm/mwait.h | 2 +-
arch/x86/kernel/cpu/intel.c | 5 +++++
arch/x86/kernel/process.c | 2 +-
4 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index c64b1e9..c5097a7 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -310,5 +310,5 @@
#endif
#define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */
#define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */
-
+#define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote cpu */
#endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
index 0deeb2d..f37f2d8 100644
--- a/arch/x86/include/asm/mwait.h
+++ b/arch/x86/include/asm/mwait.h
@@ -97,7 +97,7 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
*/
static inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
{
- if (!current_set_polling_and_test()) {
+ if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) {
if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) {
mb();
clflush((void *)¤t_thread_info()->flags);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index f380b61..fcd484d 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
#include <asm/msr.h>
#include <asm/bugs.h>
#include <asm/cpu.h>
+#include <asm/intel-family.h>
#ifdef CONFIG_X86_64
#include <linux/topology.h>
@@ -508,6 +509,10 @@ static void init_intel(struct cpuinfo_x86 *c)
(c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);
+ if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) &&
+ ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT)))
+ set_cpu_bug(c, X86_BUG_MONITOR);
+
#ifdef CONFIG_X86_64
if (c->x86 == 15)
c->x86_cache_alignment = c->x86_clflush_size * 2;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 61b703c..62c0b0e 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -405,7 +405,7 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
if (c->x86_vendor != X86_VENDOR_INTEL)
return 0;
- if (!cpu_has(c, X86_FEATURE_MWAIT))
+ if (!cpu_has(c, X86_FEATURE_MWAIT) || static_cpu_has_bug(X86_BUG_MONITOR))
return 0;
return 1;
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v2] x86: add workaround monitor bug
2016-07-18 18:41 [PATCH v2] x86: add workaround monitor bug Jacob Pan
@ 2016-07-18 18:49 ` Brian Gerst
2016-07-18 19:11 ` Jacob Pan
2016-07-20 10:40 ` [tip:x86/cpu] x86/cpu: Add workaround for MONITOR instruction erratum on Goldmont based CPUs tip-bot for Peter Zijlstra
1 sibling, 1 reply; 4+ messages in thread
From: Brian Gerst @ 2016-07-18 18:49 UTC (permalink / raw)
To: Jacob Pan
Cc: LKML, Peter Zijlstra, Ingo Molnar, H. Peter Anvin, X86 Kernel,
Arjan van de Ven, Len Brown
On Mon, Jul 18, 2016 at 2:41 PM, Jacob Pan
<jacob.jun.pan@linux.intel.com> wrote:
> From: Peter Zijlstra <peterz@infradead.org>
>
> Monitored cached line may not wake up from mwait on certain
> Goldmont based CPUs. This patch will avoid calling
> current_set_polling_and_test() and thereby not set the TIF_ flag.
> The result is that we'll always send IPIs for wakeups.
>
> Signed-off-by: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> ---
> arch/x86/include/asm/cpufeatures.h | 2 +-
> arch/x86/include/asm/mwait.h | 2 +-
> arch/x86/kernel/cpu/intel.c | 5 +++++
> arch/x86/kernel/process.c | 2 +-
> 4 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index c64b1e9..c5097a7 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -310,5 +310,5 @@
> #endif
> #define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */
> #define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */
> -
> +#define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote cpu */
> #endif /* _ASM_X86_CPUFEATURES_H */
> diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
> index 0deeb2d..f37f2d8 100644
> --- a/arch/x86/include/asm/mwait.h
> +++ b/arch/x86/include/asm/mwait.h
> @@ -97,7 +97,7 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
> */
> static inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
> {
> - if (!current_set_polling_and_test()) {
> + if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) {
> if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) {
> mb();
> clflush((void *)¤t_thread_info()->flags);
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index f380b61..fcd484d 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -13,6 +13,7 @@
> #include <asm/msr.h>
> #include <asm/bugs.h>
> #include <asm/cpu.h>
> +#include <asm/intel-family.h>
>
> #ifdef CONFIG_X86_64
> #include <linux/topology.h>
> @@ -508,6 +509,10 @@ static void init_intel(struct cpuinfo_x86 *c)
> (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
> set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);
>
> + if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) &&
> + ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT)))
> + set_cpu_bug(c, X86_BUG_MONITOR);
> +
> #ifdef CONFIG_X86_64
> if (c->x86 == 15)
> c->x86_cache_alignment = c->x86_clflush_size * 2;
> diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> index 61b703c..62c0b0e 100644
> --- a/arch/x86/kernel/process.c
> +++ b/arch/x86/kernel/process.c
> @@ -405,7 +405,7 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
> if (c->x86_vendor != X86_VENDOR_INTEL)
> return 0;
>
> - if (!cpu_has(c, X86_FEATURE_MWAIT))
> + if (!cpu_has(c, X86_FEATURE_MWAIT) || static_cpu_has_bug(X86_BUG_MONITOR))
> return 0;
>
> return 1;
> --
> 2.7.4
>
It would be simpler to just force clear X86_FEATURE_MWAIT.
--
Brian Gerst
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] x86: add workaround monitor bug
2016-07-18 18:49 ` Brian Gerst
@ 2016-07-18 19:11 ` Jacob Pan
0 siblings, 0 replies; 4+ messages in thread
From: Jacob Pan @ 2016-07-18 19:11 UTC (permalink / raw)
To: Brian Gerst
Cc: LKML, Peter Zijlstra, Ingo Molnar, H. Peter Anvin, X86 Kernel,
Arjan van de Ven, Len Brown, jacob.jun.pan
On Mon, 18 Jul 2016 14:49:56 -0400
Brian Gerst <brgerst@gmail.com> wrote:
> It would be simpler to just force clear X86_FEATURE_MWAIT.
Then we cannot use intel_idle driver. In addition, ACPI idle driver
needs BIOS support which may or may not be there for all platforms.
Thanks,
Jacob
^ permalink raw reply [flat|nested] 4+ messages in thread
* [tip:x86/cpu] x86/cpu: Add workaround for MONITOR instruction erratum on Goldmont based CPUs
2016-07-18 18:41 [PATCH v2] x86: add workaround monitor bug Jacob Pan
2016-07-18 18:49 ` Brian Gerst
@ 2016-07-20 10:40 ` tip-bot for Peter Zijlstra
1 sibling, 0 replies; 4+ messages in thread
From: tip-bot for Peter Zijlstra @ 2016-07-20 10:40 UTC (permalink / raw)
To: linux-tip-commits
Cc: lenb, hpa, brgerst, torvalds, dvlasenk, luto, peterz, bp, mingo,
jpoimboe, arjan, tglx, jacob.jun.pan, linux-kernel
Commit-ID: 08e237fa56a1d95c1372033bc29c4a2517b3c0fa
Gitweb: http://git.kernel.org/tip/08e237fa56a1d95c1372033bc29c4a2517b3c0fa
Author: Peter Zijlstra <peterz@infradead.org>
AuthorDate: Mon, 18 Jul 2016 11:41:10 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Wed, 20 Jul 2016 09:48:40 +0200
x86/cpu: Add workaround for MONITOR instruction erratum on Goldmont based CPUs
Monitored cached line may not wake up from mwait on certain
Goldmont based CPUs. This patch will avoid calling
current_set_polling_and_test() and thereby not set the TIF_ flag.
The result is that we'll always send IPIs for wakeups.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Len Brown <lenb@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1468867270-18493-1-git-send-email-jacob.jun.pan@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/include/asm/mwait.h | 2 +-
arch/x86/kernel/cpu/intel.c | 5 +++++
arch/x86/kernel/process.c | 2 +-
4 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index c64b1e9..19ecc6e 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -310,5 +310,5 @@
#endif
#define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */
#define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */
-
+#define X86_BUG_MONITOR X86_BUG(12) /* IPI required to wake up remote CPU */
#endif /* _ASM_X86_CPUFEATURES_H */
diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
index 0deeb2d..f37f2d8 100644
--- a/arch/x86/include/asm/mwait.h
+++ b/arch/x86/include/asm/mwait.h
@@ -97,7 +97,7 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
*/
static inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
{
- if (!current_set_polling_and_test()) {
+ if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) {
if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) {
mb();
clflush((void *)¤t_thread_info()->flags);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index c1a89bc..abf6012 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
#include <asm/msr.h>
#include <asm/bugs.h>
#include <asm/cpu.h>
+#include <asm/intel-family.h>
#ifdef CONFIG_X86_64
#include <linux/topology.h>
@@ -508,6 +509,10 @@ static void init_intel(struct cpuinfo_x86 *c)
(c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);
+ if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) &&
+ ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT)))
+ set_cpu_bug(c, X86_BUG_MONITOR);
+
#ifdef CONFIG_X86_64
if (c->x86 == 15)
c->x86_cache_alignment = c->x86_clflush_size * 2;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 96becbb..59f68f1 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -404,7 +404,7 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
if (c->x86_vendor != X86_VENDOR_INTEL)
return 0;
- if (!cpu_has(c, X86_FEATURE_MWAIT))
+ if (!cpu_has(c, X86_FEATURE_MWAIT) || static_cpu_has_bug(X86_BUG_MONITOR))
return 0;
return 1;
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-07-20 10:42 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2016-07-18 18:41 [PATCH v2] x86: add workaround monitor bug Jacob Pan
2016-07-18 18:49 ` Brian Gerst
2016-07-18 19:11 ` Jacob Pan
2016-07-20 10:40 ` [tip:x86/cpu] x86/cpu: Add workaround for MONITOR instruction erratum on Goldmont based CPUs tip-bot for Peter Zijlstra
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