From: Peter Xu <peterx@redhat.com>
To: David Kiarie <davidkiarie4@gmail.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
rkrcmar@redhat.com, Jan Kiszka <jan.kiszka@web.de>,
Valentine Sinitsyn <valentine.sinitsyn@gmail.com>,
Eduardo Habkost <ehabkost@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [V15 3/4] hw/i386: Introduce AMD IOMMU
Date: Wed, 10 Aug 2016 09:49:02 +0800 [thread overview]
Message-ID: <20160810014902.GC4201@pxdev.xzpeter.org> (raw)
In-Reply-To: <CABdVeAB1S=8qQkU8rbsaMqsSfJO5YVLv7Q8LsajFiFv5qYfT+w@mail.gmail.com>
On Tue, Aug 09, 2016 at 08:46:09PM +0300, David Kiarie wrote:
> On Tue, Aug 9, 2016 at 8:44 AM, Peter Xu <peterx@redhat.com> wrote:
>
> > On Tue, Aug 02, 2016 at 11:39:06AM +0300, David Kiarie wrote:
> >
> > [...]
> >
> > > +/* external write */
> > > +static void amdvi_writew(AMDVIState *s, hwaddr addr, uint16_t val)
> > > +{
> > > + uint16_t romask = lduw_le_p(&s->romask[addr]);
> > > + uint16_t w1cmask = lduw_le_p(&s->w1cmask[addr]);
> > > + uint16_t oldval = lduw_le_p(&s->mmior[addr]);
> > > + stw_le_p(&s->mmior[addr], (val & ~(val & w1cmask)) | (romask &
> > oldval));
> >
> > I think the above is problematic, e.g., what if we write 1 to one of
> > the romask while it's 0 originally? In that case, the RO bit will be
> > written to 1.
> >
> > Maybe we need:
> >
> > stw_le_p(&s->mmior[addr], ((oldval & romask) | (val & ~romask)) & \
> > (val & w1cmask));
> >
> > Same question to the below two functions.
> >
>
> It seems to me you're not taking care of w1/c bits correctly ?
>
> I think:
>
> stw_le_p(&s->mmior[addr], ((oldval & romask) | (val & ~romask)) & \
> ~ (val & w1cmask));
> should suffice.
Right. :)
-- peterx
next prev parent reply other threads:[~2016-08-10 1:49 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-02 8:39 [Qemu-devel] [V15 0/4] AMD IOMMU David Kiarie
2016-08-02 8:39 ` [Qemu-devel] [V15 1/4] hw/pci: Prepare for " David Kiarie
2016-08-08 9:01 ` Peter Xu
2016-08-08 9:25 ` David Kiarie
2016-08-02 8:39 ` [Qemu-devel] [V15 2/4] hw/i386/trace-events: Add AMD IOMMU trace events David Kiarie
2016-08-02 8:39 ` [Qemu-devel] [V15 3/4] hw/i386: Introduce AMD IOMMU David Kiarie
2016-08-09 5:44 ` Peter Xu
2016-08-09 12:07 ` David Kiarie
2016-08-09 12:21 ` Peter Xu
2016-08-09 12:52 ` David Kiarie
2016-08-09 13:01 ` Valentine Sinitsyn
2016-08-09 13:17 ` David Kiarie
2016-08-10 2:08 ` Peter Xu
2016-08-10 6:30 ` David Kiarie
2016-08-09 17:46 ` David Kiarie
2016-08-10 1:49 ` Peter Xu [this message]
2016-08-11 8:23 ` Valentine Sinitsyn
2016-08-11 8:32 ` David Kiarie
2016-08-11 8:35 ` Valentine Sinitsyn
2016-08-12 19:10 ` Valentine Sinitsyn
2016-08-12 19:40 ` David Kiarie
2016-08-12 19:41 ` Valentine Sinitsyn
2016-08-02 8:39 ` [Qemu-devel] [V15 4/4] hw/i386: AMD IOMMU IVRS table David Kiarie
2016-08-02 13:32 ` Igor Mammedov
-- strict thread matches above, loose matches on Subject: below --
2016-08-09 20:27 [Qemu-devel] [V15 0/4] AMD IOMMU David Kiarie
2016-08-09 20:27 ` [Qemu-devel] [V15 3/4] hw/i386: Introduce " David Kiarie
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