From: Stephen Boyd <sboyd@codeaurora.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
Date: Wed, 10 Aug 2016 15:06:14 -0700 [thread overview]
Message-ID: <20160810220614.GE2996@codeaurora.org> (raw)
In-Reply-To: <20160715080636.GP4761@lukather>
On 07/15, Maxime Ripard wrote:
> On Thu, Jul 14, 2016 at 10:42:35AM +0800, Chen-Yu Tsai wrote:
> > The condition passed to read*_poll_timeout() is the break condition,
> > i.e. wait for this condition to happen and return success.
> >
> > The original code assumed the opposite, resulting in a warning when
> > the PLL clock rate was changed but never lost it's lock as far as
> > the readout indicated. This was verified by checking the read out
> > register value.
> >
> > Fixes: 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>
> Mike, Stephen, could you add that patch on top of the current branch?
>
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock
Date: Wed, 10 Aug 2016 15:06:14 -0700 [thread overview]
Message-ID: <20160810220614.GE2996@codeaurora.org> (raw)
In-Reply-To: <20160715080636.GP4761@lukather>
On 07/15, Maxime Ripard wrote:
> On Thu, Jul 14, 2016 at 10:42:35AM +0800, Chen-Yu Tsai wrote:
> > The condition passed to read*_poll_timeout() is the break condition,
> > i.e. wait for this condition to happen and return success.
> >
> > The original code assumed the opposite, resulting in a warning when
> > the PLL clock rate was changed but never lost it's lock as far as
> > the readout indicated. This was verified by checking the read out
> > register value.
> >
> > Fixes: 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>
> Mike, Stephen, could you add that patch on top of the current branch?
>
Applied to clk-fixes
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-08-10 22:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-14 2:42 [PATCH] clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock Chen-Yu Tsai
2016-07-14 2:42 ` Chen-Yu Tsai
2016-07-15 8:06 ` Maxime Ripard
2016-07-15 8:06 ` Maxime Ripard
2016-08-10 22:06 ` Stephen Boyd [this message]
2016-08-10 22:06 ` Stephen Boyd
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