From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2] ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
Date: Mon, 29 Aug 2016 23:20:06 +0800 [thread overview]
Message-ID: <20160829152006.GZ30790@tiger> (raw)
In-Reply-To: <AM3PR04MB1315C6AE3AC95A1150DB04D7F5E10@AM3PR04MB1315.eurprd04.prod.outlook.com>
On Mon, Aug 29, 2016 at 02:44:47PM +0000, Yongcai Huang wrote:
> This patch is to set the GINT bit for all low power mode transition.
>
> Do we decide to go with PSCI for all i.MX6 SoCs? Currently i.MX6UL's suspend is
> already supported with non-PCSI method, only i.MX7D uses PSCI, right? If we decide
> to implement all power management feature with PSCI, then yes, all these changes
> can be put into PSCI. But since current suspend/cpuidle function are already supported
> using old method, this bit must be set to avoid system goes into low power mode
> unexpected.
My apology. I messed up it with i.MX7D. Patch applied, thanks.
Shawn
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Yongcai Huang <anson.huang-3arQi8VN3Tc@public.gmane.org>
Cc: "mark.rutland-5wv7dgnIgG8@public.gmane.org"
<mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org"
<linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org"
<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH V2] ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
Date: Mon, 29 Aug 2016 23:20:06 +0800 [thread overview]
Message-ID: <20160829152006.GZ30790@tiger> (raw)
In-Reply-To: <AM3PR04MB1315C6AE3AC95A1150DB04D7F5E10-f56W/S9L6NR9w2ZlgAudoc9NdZoXdze2vxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
On Mon, Aug 29, 2016 at 02:44:47PM +0000, Yongcai Huang wrote:
> This patch is to set the GINT bit for all low power mode transition.
>
> Do we decide to go with PSCI for all i.MX6 SoCs? Currently i.MX6UL's suspend is
> already supported with non-PCSI method, only i.MX7D uses PSCI, right? If we decide
> to implement all power management feature with PSCI, then yes, all these changes
> can be put into PSCI. But since current suspend/cpuidle function are already supported
> using old method, this bit must be set to avoid system goes into low power mode
> unexpected.
My apology. I messed up it with i.MX7D. Patch applied, thanks.
Shawn
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Yongcai Huang <anson.huang@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
Fabio Estevam <fabio.estevam@nxp.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V2] ARM: dts: imx6ul iomuxc syscon is compatible to imx6q
Date: Mon, 29 Aug 2016 23:20:06 +0800 [thread overview]
Message-ID: <20160829152006.GZ30790@tiger> (raw)
In-Reply-To: <AM3PR04MB1315C6AE3AC95A1150DB04D7F5E10@AM3PR04MB1315.eurprd04.prod.outlook.com>
On Mon, Aug 29, 2016 at 02:44:47PM +0000, Yongcai Huang wrote:
> This patch is to set the GINT bit for all low power mode transition.
>
> Do we decide to go with PSCI for all i.MX6 SoCs? Currently i.MX6UL's suspend is
> already supported with non-PCSI method, only i.MX7D uses PSCI, right? If we decide
> to implement all power management feature with PSCI, then yes, all these changes
> can be put into PSCI. But since current suspend/cpuidle function are already supported
> using old method, this bit must be set to avoid system goes into low power mode
> unexpected.
My apology. I messed up it with i.MX7D. Patch applied, thanks.
Shawn
next prev parent reply other threads:[~2016-08-29 15:20 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-29 14:25 [PATCH V2] ARM: dts: imx6ul iomuxc syscon is compatible to imx6q Anson Huang
2016-08-29 14:25 ` Anson Huang
2016-08-29 14:25 ` Anson Huang
2016-08-29 14:34 ` Shawn Guo
2016-08-29 14:34 ` Shawn Guo
2016-08-29 14:34 ` Shawn Guo
2016-08-29 14:44 ` Yongcai Huang
2016-08-29 14:44 ` Yongcai Huang
2016-08-29 14:44 ` Yongcai Huang
2016-08-29 15:20 ` Shawn Guo [this message]
2016-08-29 15:20 ` Shawn Guo
2016-08-29 15:20 ` Shawn Guo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160829152006.GZ30790@tiger \
--to=shawnguo@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.