From: Brian Norris <briannorris@chromium.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
Guenter Roeck <linux@roeck-us.net>,
Bjorn Helgaas <bhelgaas@google.com>,
Marc Zyngier <marc.zyngier@arm.com>,
linux-pci@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
Heiko Stuebner <heiko@sntech.de>,
Doug Anderson <dianders@chromium.org>,
Wenrui Li <wenrui.li@rock-chips.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [v10,2/2] PCI: Rockchip: Add Rockchip PCIe controller support
Date: Thu, 1 Sep 2016 09:57:58 -0700 [thread overview]
Message-ID: <20160901165757.GA3253@localhost> (raw)
In-Reply-To: <20160901163455.GA9471@localhost>
On Thu, Sep 01, 2016 at 11:34:55AM -0500, Bjorn Helgaas wrote:
> I can't conveniently build it, so I'm sure I've broken things. I
Indeed, you have :)
> pushed the current work-in-progress branch to pci/host-rockchip-wip.
> After we fix build errors and other thinkos, I'll rename it and put it
> in -next.
I'll append a patch that gets things building and working for me. With
that:
Tested-by: Brian Norris <briannorris@chromium.org>
I haven't examined all the changes in detail, but they mostly seem
reasonable.
> I'll also post the broken-out patches for the changes I made on top of
> the previous v10 (2098142ae87d). I'll eventually squash them all into
> the original commit so we don't have the clutter in the logs.
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 6623598679f2..ac846bab7396 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -128,9 +128,9 @@
#define PCIE_CLIENT_CONF_ENABLE (0x00010000 | 0x0001)
#define PCIE_CLIENT_LINK_TRAIN_ENABLE (0x00020000 | 0x0002)
#define PCIE_CLIENT_ARI_ENABLE (0x00080000 | 0x0008)
-#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4)
+#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4))
#define PCIE_CLIENT_MODE_RC (0x00400000 | 0x0040)
-#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7)
+#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7))
#define PCIE_CLIENT_GEN_SEL_0 0
#define PCIE_CLIENT_GEN_SEL_2 1
@@ -643,14 +643,13 @@ static irqreturn_t rockchip_pcie_client_irq_handler(int irq, void *arg)
static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
- struct rockchip_pcie *rockchip;
+ struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
struct device *dev = rockchip->dev;
u32 reg;
u32 hwirq;
u32 virq;
chained_irq_enter(chip, desc);
- rockchip = irq_desc_get_handler_data(desc);
reg = rockchip_pcie_read(rockchip, PCIE_CLIENT_INT_STATUS);
reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >>
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: Bjorn Helgaas <helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
Wenrui Li <wenrui.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
Guenter Roeck <linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>
Subject: Re: [v10,2/2] PCI: Rockchip: Add Rockchip PCIe controller support
Date: Thu, 1 Sep 2016 09:57:58 -0700 [thread overview]
Message-ID: <20160901165757.GA3253@localhost> (raw)
In-Reply-To: <20160901163455.GA9471@localhost>
On Thu, Sep 01, 2016 at 11:34:55AM -0500, Bjorn Helgaas wrote:
> I can't conveniently build it, so I'm sure I've broken things. I
Indeed, you have :)
> pushed the current work-in-progress branch to pci/host-rockchip-wip.
> After we fix build errors and other thinkos, I'll rename it and put it
> in -next.
I'll append a patch that gets things building and working for me. With
that:
Tested-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
I haven't examined all the changes in detail, but they mostly seem
reasonable.
> I'll also post the broken-out patches for the changes I made on top of
> the previous v10 (2098142ae87d). I'll eventually squash them all into
> the original commit so we don't have the clutter in the logs.
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 6623598679f2..ac846bab7396 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -128,9 +128,9 @@
#define PCIE_CLIENT_CONF_ENABLE (0x00010000 | 0x0001)
#define PCIE_CLIENT_LINK_TRAIN_ENABLE (0x00020000 | 0x0002)
#define PCIE_CLIENT_ARI_ENABLE (0x00080000 | 0x0008)
-#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4)
+#define PCIE_CLIENT_CONF_LANE_NUM(x) (0x00300000 | (((x >> 1) & 3) << 4))
#define PCIE_CLIENT_MODE_RC (0x00400000 | 0x0040)
-#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7)
+#define PCIE_CLIENT_GEN_SEL(x) (0x00800000 | ((x & 1) << 7))
#define PCIE_CLIENT_GEN_SEL_0 0
#define PCIE_CLIENT_GEN_SEL_2 1
@@ -643,14 +643,13 @@ static irqreturn_t rockchip_pcie_client_irq_handler(int irq, void *arg)
static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
- struct rockchip_pcie *rockchip;
+ struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc);
struct device *dev = rockchip->dev;
u32 reg;
u32 hwirq;
u32 virq;
chained_irq_enter(chip, desc);
- rockchip = irq_desc_get_handler_data(desc);
reg = rockchip_pcie_read(rockchip, PCIE_CLIENT_INT_STATUS);
reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >>
next prev parent reply other threads:[~2016-09-01 16:57 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-19 1:34 [PATCH v10 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller Shawn Lin
2016-08-19 1:34 ` Shawn Lin
2016-08-19 1:34 ` [PATCH v10 2/2] PCI: Rockchip: Add Rockchip PCIe controller support Shawn Lin
2016-08-19 1:34 ` Shawn Lin
2016-08-31 18:17 ` [v10,2/2] " Guenter Roeck
2016-08-31 18:17 ` Guenter Roeck
2016-09-01 3:39 ` Shawn Lin
2016-09-01 3:39 ` Shawn Lin
2016-09-01 4:14 ` Guenter Roeck
2016-09-01 16:34 ` Bjorn Helgaas
2016-09-01 16:34 ` Bjorn Helgaas
2016-09-01 16:57 ` Brian Norris [this message]
2016-09-01 16:57 ` Brian Norris
2016-09-01 17:33 ` Bjorn Helgaas
2016-09-01 17:33 ` Bjorn Helgaas
2016-09-02 17:27 ` Guenter Roeck
2016-09-01 17:14 ` Brian Norris
2016-09-01 17:14 ` Brian Norris
2016-09-01 17:46 ` Heiko Stübner
2016-09-01 17:46 ` Heiko Stübner
2016-09-01 17:48 ` Bjorn Helgaas
2016-09-01 17:48 ` Bjorn Helgaas
2016-09-02 15:44 ` Bjorn Helgaas
2016-09-02 16:18 ` Brian Norris
2016-09-02 16:28 ` Heiko Stübner
2016-09-02 16:28 ` Heiko Stübner
2016-08-19 19:33 ` [PATCH v10 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller Bjorn Helgaas
2016-08-19 19:33 ` Bjorn Helgaas
2016-08-20 2:20 ` Shawn Lin
2016-08-20 2:20 ` Shawn Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160901165757.GA3253@localhost \
--to=briannorris@chromium.org \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=heiko@sntech.de \
--cc=helgaas@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux@roeck-us.net \
--cc=marc.zyngier@arm.com \
--cc=robh+dt@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=wenrui.li@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.