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* [for-4.8][PATCH] xen/arm64: Add missing synchronization barrier in invalidate_cache
@ 2016-09-21 14:52 Julien Grall
  2016-09-21 15:32 ` Konrad Rzeszutek Wilk
  0 siblings, 1 reply; 3+ messages in thread
From: Julien Grall @ 2016-09-21 14:52 UTC (permalink / raw)
  To: xen-devel; +Cc: Julien Grall, sstabellini

The invalidation of the instructions cache requires barriers to ensure
the completion of the invalidation before continuing (see B2.3.4 in ARM
DDI 0487A.j).

This was overlooked in commit fb9d877 "xen/arm64: Add an helper to
invalidate all instruction caches".

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/arm64/page.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h
index 79ef7bd..23d7781 100644
--- a/xen/include/asm-arm/arm64/page.h
+++ b/xen/include/asm-arm/arm64/page.h
@@ -33,6 +33,8 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
 static inline void invalidate_icache(void)
 {
     asm volatile ("ic ialluis");
+    dsb(ish);               /* Ensure completion of the flush I-cache */
+    isb();
 }
 
 /*
-- 
1.9.1


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Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-09-21 14:52 [for-4.8][PATCH] xen/arm64: Add missing synchronization barrier in invalidate_cache Julien Grall
2016-09-21 15:32 ` Konrad Rzeszutek Wilk
2016-09-21 18:24   ` Stefano Stabellini

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