* [Qemu-trivial] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word [not found] <CGME20160926135225eucas1p2586f9ab42b65e3e0d6f37e217d3caa92@eucas1p2.samsung.com> @ 2016-09-26 13:52 ` Paul Kennedy 0 siblings, 0 replies; 6+ messages in thread From: Paul Kennedy @ 2016-09-26 13:52 UTC (permalink / raw) To: qemu-devel@nongnu.org Cc: Edgar E. Iglesias, Alistair Francis, qemu-trivial@nongnu.org [-- Attachment #1: Type: text/plain, Size: 1054 bytes --] From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 2001 From: Paul Kennedy <paul.kennedy@samsung.com> Date: Mon, 26 Sep 2016 11:59:00 +0100 Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word Fix bug where least significant 32 bits overwrite most significant 32 bits of TTBR1 register. Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> --- hw/misc/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c index 7e7acd8..8255f3e 100644 --- a/hw/misc/arm-smmu.c +++ b/hw/misc/arm-smmu.c @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va, req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; req.ttbr[1][1] <<= 32; - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; if (req.s2_enabled) { req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; -- 1.7.9.5 [-- Attachment #2: Type: text/html, Size: 1740 bytes --] ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word @ 2016-09-26 13:52 ` Paul Kennedy 0 siblings, 0 replies; 6+ messages in thread From: Paul Kennedy @ 2016-09-26 13:52 UTC (permalink / raw) To: qemu-devel@nongnu.org Cc: Edgar E. Iglesias, Alistair Francis, qemu-trivial@nongnu.org >From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 2001 From: Paul Kennedy <paul.kennedy@samsung.com> Date: Mon, 26 Sep 2016 11:59:00 +0100 Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word Fix bug where least significant 32 bits overwrite most significant 32 bits of TTBR1 register. Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> --- hw/misc/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c index 7e7acd8..8255f3e 100644 --- a/hw/misc/arm-smmu.c +++ b/hw/misc/arm-smmu.c @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va, req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; req.ttbr[1][1] <<= 32; - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; if (req.s2_enabled) { req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Qemu-trivial] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word 2016-09-26 13:52 ` [Qemu-devel] " Paul Kennedy @ 2016-09-26 14:56 ` Edgar E. Iglesias -1 siblings, 0 replies; 6+ messages in thread From: Edgar E. Iglesias @ 2016-09-26 14:56 UTC (permalink / raw) To: Paul Kennedy Cc: qemu-devel@nongnu.org, Alistair Francis, qemu-trivial@nongnu.org On Mon, Sep 26, 2016 at 01:52:22PM +0000, Paul Kennedy wrote: > From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 2001 > From: Paul Kennedy <paul.kennedy@samsung.com> > Date: Mon, 26 Sep 2016 11:59:00 +0100 > Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 > bit word > > Fix bug where least significant 32 bits overwrite most significant > 32 bits of TTBR1 register. Hi Paul, Thanks for the patch. This code is not upstream yet, it's staged in the Xilinx tree. It probably doesn't makes sense to CC qemu-devel@nongnu.org and qemu-trivial@nongnu.org yet but there's a git@xilinx.com for future patches to staged Xilinx code. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Alistair, can you merge this to our trees? Cheers, Edgar > > Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> > --- > hw/misc/arm-smmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c > index 7e7acd8..8255f3e 100644 > --- a/hw/misc/arm-smmu.c > +++ b/hw/misc/arm-smmu.c > @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va, > > req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; > req.ttbr[1][1] <<= 32; > - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > if (req.s2_enabled) { > req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; > -- > 1.7.9.5 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word @ 2016-09-26 14:56 ` Edgar E. Iglesias 0 siblings, 0 replies; 6+ messages in thread From: Edgar E. Iglesias @ 2016-09-26 14:56 UTC (permalink / raw) To: Paul Kennedy Cc: qemu-devel@nongnu.org, Alistair Francis, qemu-trivial@nongnu.org On Mon, Sep 26, 2016 at 01:52:22PM +0000, Paul Kennedy wrote: > From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 2001 > From: Paul Kennedy <paul.kennedy@samsung.com> > Date: Mon, 26 Sep 2016 11:59:00 +0100 > Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 > bit word > > Fix bug where least significant 32 bits overwrite most significant > 32 bits of TTBR1 register. Hi Paul, Thanks for the patch. This code is not upstream yet, it's staged in the Xilinx tree. It probably doesn't makes sense to CC qemu-devel@nongnu.org and qemu-trivial@nongnu.org yet but there's a git@xilinx.com for future patches to staged Xilinx code. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Alistair, can you merge this to our trees? Cheers, Edgar > > Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> > --- > hw/misc/arm-smmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c > index 7e7acd8..8255f3e 100644 > --- a/hw/misc/arm-smmu.c > +++ b/hw/misc/arm-smmu.c > @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned int cb, hwaddr va, > > req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; > req.ttbr[1][1] <<= 32; > - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > if (req.s2_enabled) { > req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; > -- > 1.7.9.5 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-trivial] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word 2016-09-26 14:56 ` [Qemu-devel] " Edgar E. Iglesias @ 2016-11-01 16:29 ` Alistair Francis -1 siblings, 0 replies; 6+ messages in thread From: Alistair Francis @ 2016-11-01 16:29 UTC (permalink / raw) To: Edgar Iglesias, Paul Kennedy Cc: qemu-devel@nongnu.org, qemu-trivial@nongnu.org > -----Original Message----- > From: Edgar E. Iglesias [mailto:edgar.iglesias@xilinx.com] > Sent: Monday, 26 September 2016 7:56 AM > To: Paul Kennedy <paul.kennedy@samsung.com> > Cc: qemu-devel@nongnu.org; Alistair Francis <alistai@xilinx.com>; qemu- > trivial@nongnu.org > Subject: Re: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to > form 64 bit word > > On Mon, Sep 26, 2016 at 01:52:22PM +0000, Paul Kennedy wrote: > > From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 > 2001 > > From: Paul Kennedy <paul.kennedy@samsung.com> > > Date: Mon, 26 Sep 2016 11:59:00 +0100 > > Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to > > form 64 bit word > > > > Fix bug where least significant 32 bits overwrite most significant > > 32 bits of TTBR1 register. > > Hi Paul, > > Thanks for the patch. > > This code is not upstream yet, it's staged in the Xilinx tree. > It probably doesn't makes sense to CC qemu-devel@nongnu.org and qemu- > trivial@nongnu.org yet but there's a git@xilinx.com for future patches to > staged Xilinx code. > > Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > > Alistair, can you merge this to our trees? Yep, applied! Thanks for the patch Paul. Sorry it took so long to apply, we were getting ready for a release. Thanks, Alistair > > Cheers, > Edgar > > > > > Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> > > --- > > hw/misc/arm-smmu.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c index > > 7e7acd8..8255f3e 100644 > > --- a/hw/misc/arm-smmu.c > > +++ b/hw/misc/arm-smmu.c > > @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned > int > > cb, hwaddr va, > > > > req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; > > req.ttbr[1][1] <<= 32; > > - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > > > if (req.s2_enabled) { > > req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; > > -- > > 1.7.9.5 > > This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word @ 2016-11-01 16:29 ` Alistair Francis 0 siblings, 0 replies; 6+ messages in thread From: Alistair Francis @ 2016-11-01 16:29 UTC (permalink / raw) To: Edgar Iglesias, Paul Kennedy Cc: qemu-devel@nongnu.org, qemu-trivial@nongnu.org > -----Original Message----- > From: Edgar E. Iglesias [mailto:edgar.iglesias@xilinx.com] > Sent: Monday, 26 September 2016 7:56 AM > To: Paul Kennedy <paul.kennedy@samsung.com> > Cc: qemu-devel@nongnu.org; Alistair Francis <alistai@xilinx.com>; qemu- > trivial@nongnu.org > Subject: Re: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to > form 64 bit word > > On Mon, Sep 26, 2016 at 01:52:22PM +0000, Paul Kennedy wrote: > > From 7bf015d76a5b53cd061c91f91fea4427101b26fd Mon Sep 17 00:00:00 > 2001 > > From: Paul Kennedy <paul.kennedy@samsung.com> > > Date: Mon, 26 Sep 2016 11:59:00 +0100 > > Subject: [PATCH] arm-smmu: Fix bug when merging two 32 bit words to > > form 64 bit word > > > > Fix bug where least significant 32 bits overwrite most significant > > 32 bits of TTBR1 register. > > Hi Paul, > > Thanks for the patch. > > This code is not upstream yet, it's staged in the Xilinx tree. > It probably doesn't makes sense to CC qemu-devel@nongnu.org and qemu- > trivial@nongnu.org yet but there's a git@xilinx.com for future patches to > staged Xilinx code. > > Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> > > Alistair, can you merge this to our trees? Yep, applied! Thanks for the patch Paul. Sorry it took so long to apply, we were getting ready for a release. Thanks, Alistair > > Cheers, > Edgar > > > > > Signed-off-by: Paul C Kennedy <paul.kennedy@samsung.com> > > --- > > hw/misc/arm-smmu.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/hw/misc/arm-smmu.c b/hw/misc/arm-smmu.c index > > 7e7acd8..8255f3e 100644 > > --- a/hw/misc/arm-smmu.c > > +++ b/hw/misc/arm-smmu.c > > @@ -6566,7 +6566,7 @@ static bool smmu500_at64(SMMU *s, unsigned > int > > cb, hwaddr va, > > > > req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_HIGH + cb_offset]; > > req.ttbr[1][1] <<= 32; > > - req.ttbr[1][1] = s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > + req.ttbr[1][1] |= s->regs[R_SMMU_CB0_TTBR1_LOW + cb_offset]; > > > > if (req.s2_enabled) { > > req.tcr[2] = s->regs[R_SMMU_CB0_TCR_LPAE + cb2_offset]; > > -- > > 1.7.9.5 > > This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ^ permalink raw reply [flat|nested] 6+ messages in thread
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[not found] <CGME20160926135225eucas1p2586f9ab42b65e3e0d6f37e217d3caa92@eucas1p2.samsung.com>
2016-09-26 13:52 ` [Qemu-trivial] [PATCH] arm-smmu: Fix bug when merging two 32 bit words to form 64 bit word Paul Kennedy
2016-09-26 13:52 ` [Qemu-devel] " Paul Kennedy
2016-09-26 14:56 ` [Qemu-trivial] " Edgar E. Iglesias
2016-09-26 14:56 ` [Qemu-devel] " Edgar E. Iglesias
2016-11-01 16:29 ` [Qemu-trivial] " Alistair Francis
2016-11-01 16:29 ` [Qemu-devel] " Alistair Francis
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