From: Brian Norris <briannorris@chromium.org>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
Rajat Jain <rajatja@google.com>,
Wenrui Li <wenrui.li@rock-chips.com>,
devicetree@vger.kernel.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v4] PCI: rockchip: Support property to specify the link capability
Date: Thu, 6 Oct 2016 14:38:00 -0700 [thread overview]
Message-ID: <20161006213800.GA2347@localhost> (raw)
In-Reply-To: <1475743800-1036-1-git-send-email-shawn.lin@rock-chips.com>
On Thu, Oct 06, 2016 at 04:50:00PM +0800, Shawn Lin wrote:
> From: Brian Norris <briannorris@chromium.org>
>
> rk3399 supports PCIe 2.x link speeds marginally at best, and on some
> boards, the link won't train at 5 GT/s at all. Rather than sacrifice 500
> ms waiting for training that will never happen, let's add a property
> from devicetree to specify link capability.
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> ---
>
> Changes in v4:
> - define link_gen as u32
> - elaborate more for rockchip,max-link-speed on doc
>
> Changes in v3:
> - Cast a warning for invalid max link speed and use gen1 for it.
> That looks better than v2. (Suggested by Brian)
>
> Changes in v2:
> - rename the property to rockchip,max-link-speed according to
> Bjorn's recommendation and take some bits from imx6q-pcie to
> make this requirement more consisent.
>
> .../devicetree/bindings/pci/rockchip-pcie.txt | 4 ++
> drivers/pci/host/pcie-rockchip.c | 63 ++++++++++++++--------
> 2 files changed, 44 insertions(+), 23 deletions(-)
Not sure if it means anything much, since I wrote half of this, but:
Reviewed-by: Brian Norris <briannorris@chromium.org>
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Rajat Jain <rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
Wenrui Li <wenrui.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH v4] PCI: rockchip: Support property to specify the link capability
Date: Thu, 6 Oct 2016 14:38:00 -0700 [thread overview]
Message-ID: <20161006213800.GA2347@localhost> (raw)
In-Reply-To: <1475743800-1036-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
On Thu, Oct 06, 2016 at 04:50:00PM +0800, Shawn Lin wrote:
> From: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>
> rk3399 supports PCIe 2.x link speeds marginally at best, and on some
> boards, the link won't train at 5 GT/s at all. Rather than sacrifice 500
> ms waiting for training that will never happen, let's add a property
> from devicetree to specify link capability.
>
> Signed-off-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> ---
>
> Changes in v4:
> - define link_gen as u32
> - elaborate more for rockchip,max-link-speed on doc
>
> Changes in v3:
> - Cast a warning for invalid max link speed and use gen1 for it.
> That looks better than v2. (Suggested by Brian)
>
> Changes in v2:
> - rename the property to rockchip,max-link-speed according to
> Bjorn's recommendation and take some bits from imx6q-pcie to
> make this requirement more consisent.
>
> .../devicetree/bindings/pci/rockchip-pcie.txt | 4 ++
> drivers/pci/host/pcie-rockchip.c | 63 ++++++++++++++--------
> 2 files changed, 44 insertions(+), 23 deletions(-)
Not sure if it means anything much, since I wrote half of this, but:
Reviewed-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
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next prev parent reply other threads:[~2016-10-06 21:38 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-06 8:50 [PATCH v4] PCI: rockchip: Support property to specify the link capability Shawn Lin
2016-10-06 8:50 ` Shawn Lin
2016-10-06 21:38 ` Brian Norris [this message]
2016-10-06 21:38 ` Brian Norris
2016-10-10 14:16 ` Rob Herring
2016-10-10 14:16 ` Rob Herring
2016-10-10 17:20 ` Brian Norris
2016-10-10 19:34 ` Rob Herring
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