[PATCH 0/2] Add the HiSilicon Flash Memory Controller driver

[PATCH 0/2] Add the HiSilicon Flash Memory Controller driver

[linshunquan 00354166]

Brief:
The HiSilicon Flash Memory Controller(FMC) is feature-rich that supports
3 interfaces: SPI Nor, SPI Nand and Parallel Nand, choosed by the different
chipselect and boot media of board, these sub-controllers share the same
register block. The transmission protocol of each interface is different
depends on their own framework.

The HiSilicon Spi Nor framework you can refer to:
drivers/mtd/spi-nor/hisi-sfc.c
Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt

Shunquan Lin (2):
  mfd: Add HiSilicon Flash Memory Controller(FMC) driver
  mtd: spi nor: gets resource from HiSilicon Flash Memory Controller
    driver

 .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
 drivers/mfd/Kconfig                                |  10 ++
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
 drivers/mtd/spi-nor/hisi-sfc.c                     |  86 ++--------------
 include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
 6 files changed, 280 insertions(+), 80 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
 create mode 100644 drivers/mfd/hisi_fmc.c
 create mode 100644 include/linux/mfd/hisi_fmc.h

-- 
2.3.7

[PATCH 0/2] Add the HiSilicon Flash Memory Controller driver

[linshunquan 00354166]

Brief:
The HiSilicon Flash Memory Controller(FMC) is feature-rich that supports
3 interfaces: SPI Nor, SPI Nand and Parallel Nand, choosed by the different
chipselect and boot media of board, these sub-controllers share the same
register block. The transmission protocol of each interface is different
depends on their own framework.

The HiSilicon Spi Nor framework you can refer to:
drivers/mtd/spi-nor/hisi-sfc.c
Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt

Shunquan Lin (2):
  mfd: Add HiSilicon Flash Memory Controller(FMC) driver
  mtd: spi nor: gets resource from HiSilicon Flash Memory Controller
    driver

 .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
 drivers/mfd/Kconfig                                |  10 ++
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
 drivers/mtd/spi-nor/hisi-sfc.c                     |  86 ++--------------
 include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
 6 files changed, 280 insertions(+), 80 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
 create mode 100644 drivers/mfd/hisi_fmc.c
 create mode 100644 include/linux/mfd/hisi_fmc.h

-- 
2.3.7


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

[PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[linshunquan 00354166]

From: Shunquan Lin <linshunquan1@hisilicon.com>

This patch adds driver support for HiSilicon Flash Memory
Controller(FMC). HiSilicon FMC is a multi-functions device which
supports SPI Nor flash controller, SPI nand Flash controller and
parallel nand flash controller.

Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
---
 .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
 drivers/mfd/Kconfig                                |  10 ++
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
 include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
 5 files changed, 274 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
 create mode 100644 drivers/mfd/hisi_fmc.c
 create mode 100644 include/linux/mfd/hisi_fmc.h

diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
new file mode 100644
index 0000000..cf41664
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
@@ -0,0 +1,62 @@
+HiSilicon Flash Memory Controller
+
+The HiSilicon Flash Memory Controller(FMC) is a feature-rich controller
+that supports SPI Nor, SPI Nand and Parallel Nand devices. This document
+describes the binding for HiSilicon FMC device and its sub-notes.
+
+Required properties:
+- compatible : Should be "hisilicon,hisi-fmc".
+- reg : Offset and length of the register set for the controller device.
+- reg-names : Must include the following two entries: "control", "memory".
+- address-cells : Should be 1.
+- size-cells : Should be 0.
+- clocks : A phandle to the HiSilicon FMC controller clock.
+
+Optional sub-nodes:
+	- spi-nor:
+	Required properties:
+		- compatible : "hisilicon,fmc-spi-nor"
+	see "Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt
+
+	- spi-nand:
+	Required properties:
+		- compatible : "hisilicon,fmc-spi-nand"
+		- reg : The chipselect for spi-nand devices
+		- address-cells : Should be 1.
+		- size-cells : Should be 0.
+
+	- nand:
+	Required properties:
+		- compatible : "hisilicon,fmc-nand"
+		- reg : The chipselect for nand devices
+		- address-cells : Should be 1.
+		- size-cells : Should be 0.
+
+Example:
+fmc: flash-memory-controller@10000000 {
+		 compatible = "hisilicon,hisi-fmc";
+		 reg = <0x10000000 0x1000>, <0x14000000 0x1000000>;
+		 reg-names = "control", "memory";
+		 clocks = <&crg FMC_CLK>;
+
+		 hisfc:spi-nor {
+				   compatible = "hisilicon,fmc-spi-nor";
+				   #address-cells = <1>;
+				   #size-cells = <0>;
+				   hi_sfc@0 {
+					   compatible = "jedec,spi-nor";
+					   reg = <0>;
+				   };
+				/*
+				 * Here you can add the spi nor flash devices.
+				 * They share the same spi nor controller, but
+				 * have different chipselect.
+				 */
+		};
+
+		/*
+		 * Here you can add spi nand and nand sub-nodes. It depends
+		 * on the board-grade design.
+		 */
+
+};
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 2d1fb64..57473dc 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -340,6 +340,16 @@ config MFD_HI655X_PMIC
 	help
 	  Select this option to enable Hisilicon hi655x series pmic driver.
 
+config MFD_HISI_FMC
+	tristate "HiSilicon Flash Memory Controller"
+	depends on OF
+	select MFD_CORE
+	select REGMAP_MMIO
+	default y if (SPI_HISI_SFC)
+	help
+	  Select this option to enable the HiSilicon Flash Memory
+	  Controller(FMC) driver.
+
 config HTC_EGPIO
 	bool "HTC EGPIO support"
 	depends on GPIOLIB && ARM
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 2ba3ba3..a2476fb 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -176,6 +176,7 @@ obj-$(CONFIG_MFD_TPS65090)	+= tps65090.o
 obj-$(CONFIG_MFD_AAT2870_CORE)	+= aat2870-core.o
 obj-$(CONFIG_MFD_ATMEL_FLEXCOM)	+= atmel-flexcom.o
 obj-$(CONFIG_MFD_ATMEL_HLCDC)	+= atmel-hlcdc.o
+obj-$(CONFIG_MFD_HISI_FMC)	+= hisi_fmc.o
 obj-$(CONFIG_MFD_INTEL_LPSS)	+= intel-lpss.o
 obj-$(CONFIG_MFD_INTEL_LPSS_PCI)	+= intel-lpss-pci.o
 obj-$(CONFIG_MFD_INTEL_LPSS_ACPI)	+= intel-lpss-acpi.o
diff --git a/drivers/mfd/hisi_fmc.c b/drivers/mfd/hisi_fmc.c
new file mode 100644
index 0000000..97ae3be
--- /dev/null
+++ b/drivers/mfd/hisi_fmc.c
@@ -0,0 +1,109 @@
+/* HiSilicon Flash Memory Controller Driver
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/hisi_fmc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+/* ------------------------------------------------------------------------ */
+static const struct mfd_cell hisi_fmc_devs[] = {
+	{
+		.name = "hisi_spi_nor",
+		.of_compatible = "hisilicon,fmc-spi-nor",
+	},
+	{
+		.name = "hisi_spi_nand",
+		.of_compatible = "hisilicon,fmc-spi-nand",
+	},
+	{
+		.name = "hisi_nand",
+		.of_compatible = "hisilicon,fmc-nand",
+	},
+};
+
+static int hisi_fmc_probe(struct platform_device *pdev)
+{
+	struct hisi_fmc *fmc;
+	struct resource *res;
+	int ret;
+
+	fmc = devm_kzalloc(&pdev->dev, sizeof(*fmc), GFP_KERNEL);
+	if (!fmc)
+		return -ENOMEM;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control");
+	fmc->regbase = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(fmc->regbase))
+		return PTR_ERR(fmc->regbase);
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "memory");
+	fmc->iobase = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(fmc->iobase))
+		return PTR_ERR(fmc->iobase);
+
+	fmc->clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(fmc->clk))
+		return PTR_ERR(fmc->clk);
+
+	mutex_init(&fmc->lock);
+
+	platform_set_drvdata(pdev, fmc);
+
+	ret = mfd_add_devices(&pdev->dev, 0, hisi_fmc_devs,
+			ARRAY_SIZE(hisi_fmc_devs), NULL, 0, NULL);
+	if (ret) {
+		dev_err(&pdev->dev, "add mfd devices failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int hisi_fmc_remove(struct platform_device *pdev)
+{
+	struct hisi_fmc *fmc = platform_get_drvdata(pdev);
+
+	mfd_remove_devices(&pdev->dev);
+	mutex_destroy(&fmc->lock);
+
+	return 0;
+}
+
+static const struct of_device_id hisi_fmc_of_match_tbl[] = {
+	{ .compatible = "hisilicon,hisi-fmc"},
+	{ }
+};
+MODULE_DEVICE_TABLE(of, hisi_fmc_of_match_tbl);
+
+static struct platform_driver hisi_fmc_driver = {
+	.driver = {
+		.name = "hifmc",
+		.of_match_table = hisi_fmc_of_match_tbl,
+	},
+	.probe = hisi_fmc_probe,
+	.remove = hisi_fmc_remove,
+};
+module_platform_driver(hisi_fmc_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("HiSilicon Flash Memory Controller Driver");
diff --git a/include/linux/mfd/hisi_fmc.h b/include/linux/mfd/hisi_fmc.h
new file mode 100644
index 0000000..e569700
--- /dev/null
+++ b/include/linux/mfd/hisi_fmc.h
@@ -0,0 +1,92 @@
+/*
+ * Header file for HiSilicon Flash Memory Controller Driver
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __HISI_FMC_H
+#define __HISI_FMC_H
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/mutex.h>
+
+/* Hardware register offsets and field definitions */
+#define FMC_CFG				0x00
+#define FMC_CFG_OP_MODE_MASK		BIT_MASK(0)
+#define FMC_CFG_OP_MODE_BOOT		0
+#define FMC_CFG_OP_MODE_NORMAL		1
+#define FMC_CFG_FLASH_SEL(type)		(((type) & 0x3) << 1)
+#define FMC_CFG_FLASH_SEL_MASK		0x6
+#define FMC_ECC_TYPE(type)		(((type) & 0x7) << 5)
+#define FMC_ECC_TYPE_MASK		GENMASK(7, 5)
+#define SPI_NOR_ADDR_MODE_MASK		BIT_MASK(10)
+#define SPI_NOR_ADDR_MODE_3BYTES	(0x0 << 10)
+#define SPI_NOR_ADDR_MODE_4BYTES	(0x1 << 10)
+#define FMC_GLOBAL_CFG			0x04
+#define FMC_GLOBAL_CFG_WP_ENABLE	BIT(6)
+#define FMC_SPI_TIMING_CFG		0x08
+#define TIMING_CFG_TCSH(nr)		(((nr) & 0xf) << 8)
+#define TIMING_CFG_TCSS(nr)		(((nr) & 0xf) << 4)
+#define TIMING_CFG_TSHSL(nr)		((nr) & 0xf)
+#define CS_HOLD_TIME			0x6
+#define CS_SETUP_TIME			0x6
+#define CS_DESELECT_TIME		0xf
+#define FMC_INT				0x18
+#define FMC_INT_OP_DONE			BIT(0)
+#define FMC_INT_CLR			0x20
+#define FMC_CMD				0x24
+#define FMC_CMD_CMD1(cmd)		((cmd) & 0xff)
+#define FMC_ADDRL			0x2c
+#define FMC_OP_CFG			0x30
+#define OP_CFG_FM_CS(cs)		((cs) << 11)
+#define OP_CFG_MEM_IF_TYPE(type)	(((type) & 0x7) << 7)
+#define OP_CFG_ADDR_NUM(addr)		(((addr) & 0x7) << 4)
+#define OP_CFG_DUMMY_NUM(dummy)		((dummy) & 0xf)
+#define FMC_DATA_NUM			0x38
+#define FMC_DATA_NUM_CNT(cnt)		((cnt) & GENMASK(13, 0))
+#define FMC_OP				0x3c
+#define FMC_OP_DUMMY_EN			BIT(8)
+#define FMC_OP_CMD1_EN			BIT(7)
+#define FMC_OP_ADDR_EN			BIT(6)
+#define FMC_OP_WRITE_DATA_EN		BIT(5)
+#define FMC_OP_READ_DATA_EN		BIT(2)
+#define FMC_OP_READ_STATUS_EN		BIT(1)
+#define FMC_OP_REG_OP_START		BIT(0)
+#define FMC_DMA_LEN			0x40
+#define FMC_DMA_LEN_SET(len)		((len) & GENMASK(27, 0))
+#define FMC_DMA_SADDR_D0		0x4c
+#define HIFMC_DMA_MAX_LEN		(4096)
+#define HIFMC_DMA_MASK			(HIFMC_DMA_MAX_LEN - 1)
+#define FMC_OP_DMA			0x68
+#define OP_CTRL_RD_OPCODE(code)		(((code) & 0xff) << 16)
+#define OP_CTRL_WR_OPCODE(code)		(((code) & 0xff) << 8)
+#define OP_CTRL_RW_OP(op)		((op) << 1)
+#define OP_CTRL_DMA_OP_READY		BIT(0)
+#define FMC_OP_READ			0x0
+#define FMC_OP_WRITE			0x1
+#define FMC_WAIT_TIMEOUT		1000000
+
+#define HIFMC_MAX_CHIP_NUM		2
+
+enum hifmc_iftype {
+	IF_TYPE_STD,
+	IF_TYPE_DUAL,
+	IF_TYPE_DIO,
+	IF_TYPE_QUAD,
+	IF_TYPE_QIO,
+};
+
+struct hisi_fmc {
+	void __iomem *regbase;
+	void __iomem *iobase;
+	struct clk *clk;
+	struct mutex lock;
+};
+
+#endif
-- 
2.3.7

[PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[linshunquan 00354166]

From: Shunquan Lin <linshunquan1@hisilicon.com>

This patch adds driver support for HiSilicon Flash Memory
Controller(FMC). HiSilicon FMC is a multi-functions device which
supports SPI Nor flash controller, SPI nand Flash controller and
parallel nand flash controller.

Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
---
 .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
 drivers/mfd/Kconfig                                |  10 ++
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
 include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
 5 files changed, 274 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
 create mode 100644 drivers/mfd/hisi_fmc.c
 create mode 100644 include/linux/mfd/hisi_fmc.h

diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
new file mode 100644
index 0000000..cf41664
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
@@ -0,0 +1,62 @@
+HiSilicon Flash Memory Controller
+
+The HiSilicon Flash Memory Controller(FMC) is a feature-rich controller
+that supports SPI Nor, SPI Nand and Parallel Nand devices. This document
+describes the binding for HiSilicon FMC device and its sub-notes.
+
+Required properties:
+- compatible : Should be "hisilicon,hisi-fmc".
+- reg : Offset and length of the register set for the controller device.
+- reg-names : Must include the following two entries: "control", "memory".
+- address-cells : Should be 1.
+- size-cells : Should be 0.
+- clocks : A phandle to the HiSilicon FMC controller clock.
+
+Optional sub-nodes:
+	- spi-nor:
+	Required properties:
+		- compatible : "hisilicon,fmc-spi-nor"
+	see "Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt
+
+	- spi-nand:
+	Required properties:
+		- compatible : "hisilicon,fmc-spi-nand"
+		- reg : The chipselect for spi-nand devices
+		- address-cells : Should be 1.
+		- size-cells : Should be 0.
+
+	- nand:
+	Required properties:
+		- compatible : "hisilicon,fmc-nand"
+		- reg : The chipselect for nand devices
+		- address-cells : Should be 1.
+		- size-cells : Should be 0.
+
+Example:
+fmc: flash-memory-controller@10000000 {
+		 compatible = "hisilicon,hisi-fmc";
+		 reg = <0x10000000 0x1000>, <0x14000000 0x1000000>;
+		 reg-names = "control", "memory";
+		 clocks = <&crg FMC_CLK>;
+
+		 hisfc:spi-nor {
+				   compatible = "hisilicon,fmc-spi-nor";
+				   #address-cells = <1>;
+				   #size-cells = <0>;
+				   hi_sfc@0 {
+					   compatible = "jedec,spi-nor";
+					   reg = <0>;
+				   };
+				/*
+				 * Here you can add the spi nor flash devices.
+				 * They share the same spi nor controller, but
+				 * have different chipselect.
+				 */
+		};
+
+		/*
+		 * Here you can add spi nand and nand sub-nodes. It depends
+		 * on the board-grade design.
+		 */
+
+};
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 2d1fb64..57473dc 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -340,6 +340,16 @@ config MFD_HI655X_PMIC
 	help
 	  Select this option to enable Hisilicon hi655x series pmic driver.
 
+config MFD_HISI_FMC
+	tristate "HiSilicon Flash Memory Controller"
+	depends on OF
+	select MFD_CORE
+	select REGMAP_MMIO
+	default y if (SPI_HISI_SFC)
+	help
+	  Select this option to enable the HiSilicon Flash Memory
+	  Controller(FMC) driver.
+
 config HTC_EGPIO
 	bool "HTC EGPIO support"
 	depends on GPIOLIB && ARM
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 2ba3ba3..a2476fb 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -176,6 +176,7 @@ obj-$(CONFIG_MFD_TPS65090)	+= tps65090.o
 obj-$(CONFIG_MFD_AAT2870_CORE)	+= aat2870-core.o
 obj-$(CONFIG_MFD_ATMEL_FLEXCOM)	+= atmel-flexcom.o
 obj-$(CONFIG_MFD_ATMEL_HLCDC)	+= atmel-hlcdc.o
+obj-$(CONFIG_MFD_HISI_FMC)	+= hisi_fmc.o
 obj-$(CONFIG_MFD_INTEL_LPSS)	+= intel-lpss.o
 obj-$(CONFIG_MFD_INTEL_LPSS_PCI)	+= intel-lpss-pci.o
 obj-$(CONFIG_MFD_INTEL_LPSS_ACPI)	+= intel-lpss-acpi.o
diff --git a/drivers/mfd/hisi_fmc.c b/drivers/mfd/hisi_fmc.c
new file mode 100644
index 0000000..97ae3be
--- /dev/null
+++ b/drivers/mfd/hisi_fmc.c
@@ -0,0 +1,109 @@
+/* HiSilicon Flash Memory Controller Driver
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/hisi_fmc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+/* ------------------------------------------------------------------------ */
+static const struct mfd_cell hisi_fmc_devs[] = {
+	{
+		.name = "hisi_spi_nor",
+		.of_compatible = "hisilicon,fmc-spi-nor",
+	},
+	{
+		.name = "hisi_spi_nand",
+		.of_compatible = "hisilicon,fmc-spi-nand",
+	},
+	{
+		.name = "hisi_nand",
+		.of_compatible = "hisilicon,fmc-nand",
+	},
+};
+
+static int hisi_fmc_probe(struct platform_device *pdev)
+{
+	struct hisi_fmc *fmc;
+	struct resource *res;
+	int ret;
+
+	fmc = devm_kzalloc(&pdev->dev, sizeof(*fmc), GFP_KERNEL);
+	if (!fmc)
+		return -ENOMEM;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control");
+	fmc->regbase = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(fmc->regbase))
+		return PTR_ERR(fmc->regbase);
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "memory");
+	fmc->iobase = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(fmc->iobase))
+		return PTR_ERR(fmc->iobase);
+
+	fmc->clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(fmc->clk))
+		return PTR_ERR(fmc->clk);
+
+	mutex_init(&fmc->lock);
+
+	platform_set_drvdata(pdev, fmc);
+
+	ret = mfd_add_devices(&pdev->dev, 0, hisi_fmc_devs,
+			ARRAY_SIZE(hisi_fmc_devs), NULL, 0, NULL);
+	if (ret) {
+		dev_err(&pdev->dev, "add mfd devices failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int hisi_fmc_remove(struct platform_device *pdev)
+{
+	struct hisi_fmc *fmc = platform_get_drvdata(pdev);
+
+	mfd_remove_devices(&pdev->dev);
+	mutex_destroy(&fmc->lock);
+
+	return 0;
+}
+
+static const struct of_device_id hisi_fmc_of_match_tbl[] = {
+	{ .compatible = "hisilicon,hisi-fmc"},
+	{ }
+};
+MODULE_DEVICE_TABLE(of, hisi_fmc_of_match_tbl);
+
+static struct platform_driver hisi_fmc_driver = {
+	.driver = {
+		.name = "hifmc",
+		.of_match_table = hisi_fmc_of_match_tbl,
+	},
+	.probe = hisi_fmc_probe,
+	.remove = hisi_fmc_remove,
+};
+module_platform_driver(hisi_fmc_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("HiSilicon Flash Memory Controller Driver");
diff --git a/include/linux/mfd/hisi_fmc.h b/include/linux/mfd/hisi_fmc.h
new file mode 100644
index 0000000..e569700
--- /dev/null
+++ b/include/linux/mfd/hisi_fmc.h
@@ -0,0 +1,92 @@
+/*
+ * Header file for HiSilicon Flash Memory Controller Driver
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __HISI_FMC_H
+#define __HISI_FMC_H
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/mutex.h>
+
+/* Hardware register offsets and field definitions */
+#define FMC_CFG				0x00
+#define FMC_CFG_OP_MODE_MASK		BIT_MASK(0)
+#define FMC_CFG_OP_MODE_BOOT		0
+#define FMC_CFG_OP_MODE_NORMAL		1
+#define FMC_CFG_FLASH_SEL(type)		(((type) & 0x3) << 1)
+#define FMC_CFG_FLASH_SEL_MASK		0x6
+#define FMC_ECC_TYPE(type)		(((type) & 0x7) << 5)
+#define FMC_ECC_TYPE_MASK		GENMASK(7, 5)
+#define SPI_NOR_ADDR_MODE_MASK		BIT_MASK(10)
+#define SPI_NOR_ADDR_MODE_3BYTES	(0x0 << 10)
+#define SPI_NOR_ADDR_MODE_4BYTES	(0x1 << 10)
+#define FMC_GLOBAL_CFG			0x04
+#define FMC_GLOBAL_CFG_WP_ENABLE	BIT(6)
+#define FMC_SPI_TIMING_CFG		0x08
+#define TIMING_CFG_TCSH(nr)		(((nr) & 0xf) << 8)
+#define TIMING_CFG_TCSS(nr)		(((nr) & 0xf) << 4)
+#define TIMING_CFG_TSHSL(nr)		((nr) & 0xf)
+#define CS_HOLD_TIME			0x6
+#define CS_SETUP_TIME			0x6
+#define CS_DESELECT_TIME		0xf
+#define FMC_INT				0x18
+#define FMC_INT_OP_DONE			BIT(0)
+#define FMC_INT_CLR			0x20
+#define FMC_CMD				0x24
+#define FMC_CMD_CMD1(cmd)		((cmd) & 0xff)
+#define FMC_ADDRL			0x2c
+#define FMC_OP_CFG			0x30
+#define OP_CFG_FM_CS(cs)		((cs) << 11)
+#define OP_CFG_MEM_IF_TYPE(type)	(((type) & 0x7) << 7)
+#define OP_CFG_ADDR_NUM(addr)		(((addr) & 0x7) << 4)
+#define OP_CFG_DUMMY_NUM(dummy)		((dummy) & 0xf)
+#define FMC_DATA_NUM			0x38
+#define FMC_DATA_NUM_CNT(cnt)		((cnt) & GENMASK(13, 0))
+#define FMC_OP				0x3c
+#define FMC_OP_DUMMY_EN			BIT(8)
+#define FMC_OP_CMD1_EN			BIT(7)
+#define FMC_OP_ADDR_EN			BIT(6)
+#define FMC_OP_WRITE_DATA_EN		BIT(5)
+#define FMC_OP_READ_DATA_EN		BIT(2)
+#define FMC_OP_READ_STATUS_EN		BIT(1)
+#define FMC_OP_REG_OP_START		BIT(0)
+#define FMC_DMA_LEN			0x40
+#define FMC_DMA_LEN_SET(len)		((len) & GENMASK(27, 0))
+#define FMC_DMA_SADDR_D0		0x4c
+#define HIFMC_DMA_MAX_LEN		(4096)
+#define HIFMC_DMA_MASK			(HIFMC_DMA_MAX_LEN - 1)
+#define FMC_OP_DMA			0x68
+#define OP_CTRL_RD_OPCODE(code)		(((code) & 0xff) << 16)
+#define OP_CTRL_WR_OPCODE(code)		(((code) & 0xff) << 8)
+#define OP_CTRL_RW_OP(op)		((op) << 1)
+#define OP_CTRL_DMA_OP_READY		BIT(0)
+#define FMC_OP_READ			0x0
+#define FMC_OP_WRITE			0x1
+#define FMC_WAIT_TIMEOUT		1000000
+
+#define HIFMC_MAX_CHIP_NUM		2
+
+enum hifmc_iftype {
+	IF_TYPE_STD,
+	IF_TYPE_DUAL,
+	IF_TYPE_DIO,
+	IF_TYPE_QUAD,
+	IF_TYPE_QIO,
+};
+
+struct hisi_fmc {
+	void __iomem *regbase;
+	void __iomem *iobase;
+	struct clk *clk;
+	struct mutex lock;
+};
+
+#endif
-- 
2.3.7

Re: [PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[Rob Herring]

On Fri, Sep 30, 2016 at 04:59:30PM +0800, linshunquan 00354166 wrote:
> From: Shunquan Lin <linshunquan1@hisilicon.com>
> 
> This patch adds driver support for HiSilicon Flash Memory
> Controller(FMC). HiSilicon FMC is a multi-functions device which
> supports SPI Nor flash controller, SPI nand Flash controller and
> parallel nand flash controller.

I still have unanswered questions from the last version.

> 
> Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
> ---
>  .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
>  drivers/mfd/Kconfig                                |  10 ++
>  drivers/mfd/Makefile                               |   1 +
>  drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
>  include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
>  5 files changed, 274 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
>  create mode 100644 drivers/mfd/hisi_fmc.c
>  create mode 100644 include/linux/mfd/hisi_fmc.h

Re: [PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[Rob Herring]

On Fri, Sep 30, 2016 at 04:59:30PM +0800, linshunquan 00354166 wrote:
> From: Shunquan Lin <linshunquan1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
> 
> This patch adds driver support for HiSilicon Flash Memory
> Controller(FMC). HiSilicon FMC is a multi-functions device which
> supports SPI Nor flash controller, SPI nand Flash controller and
> parallel nand flash controller.

I still have unanswered questions from the last version.

> 
> Signed-off-by: Shunquan Lin <linshunquan1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
> ---
>  .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
>  drivers/mfd/Kconfig                                |  10 ++
>  drivers/mfd/Makefile                               |   1 +
>  drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
>  include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
>  5 files changed, 274 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
>  create mode 100644 drivers/mfd/hisi_fmc.c
>  create mode 100644 include/linux/mfd/hisi_fmc.h
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[Lee Jones]

On Fri, 30 Sep 2016, linshunquan 00354166 wrote:

> From: Shunquan Lin <linshunquan1@hisilicon.com>
> 
> This patch adds driver support for HiSilicon Flash Memory
> Controller(FMC). HiSilicon FMC is a multi-functions device which
> supports SPI Nor flash controller, SPI nand Flash controller and
> parallel nand flash controller.

This is not an MFD.  MFDs span multiple subsystems, where as these are
all Memory Technology Devices (MTDs).  Please find a way to support
this in the MTD subsystem.

> Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
> ---
>  .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
>  drivers/mfd/Kconfig                                |  10 ++
>  drivers/mfd/Makefile                               |   1 +
>  drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
>  include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
>  5 files changed, 274 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
>  create mode 100644 drivers/mfd/hisi_fmc.c
>  create mode 100644 include/linux/mfd/hisi_fmc.h

[...]

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH 1/2] mfd: Add HiSilicon Flash Memory Controller(FMC) driver

[Lee Jones]

On Fri, 30 Sep 2016, linshunquan 00354166 wrote:

> From: Shunquan Lin <linshunquan1@hisilicon.com>
> 
> This patch adds driver support for HiSilicon Flash Memory
> Controller(FMC). HiSilicon FMC is a multi-functions device which
> supports SPI Nor flash controller, SPI nand Flash controller and
> parallel nand flash controller.

This is not an MFD.  MFDs span multiple subsystems, where as these are
all Memory Technology Devices (MTDs).  Please find a way to support
this in the MTD subsystem.

> Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
> ---
>  .../devicetree/bindings/mfd/hisilicon,hisi-fmc.txt |  62 ++++++++++++
>  drivers/mfd/Kconfig                                |  10 ++
>  drivers/mfd/Makefile                               |   1 +
>  drivers/mfd/hisi_fmc.c                             | 109 +++++++++++++++++++++
>  include/linux/mfd/hisi_fmc.h                       |  92 +++++++++++++++++
>  5 files changed, 274 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hisi-fmc.txt
>  create mode 100644 drivers/mfd/hisi_fmc.c
>  create mode 100644 include/linux/mfd/hisi_fmc.h

[...]

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

[PATCH 2/2] mtd: spi nor: gets resource from HiSilicon Flash Memory Controller driver

[linshunquan 00354166]

From: Shunquan Lin <linshunquan1@hisilicon.com>

As the HiSilicon Flash Memory Controller(FMC) driver is a Multi-
function device drivers(MFD) that not only support spi-nor flash
controller, but spi-nand and nand, so moves the register map of
HiSilicon spi-nor flash controller driver to
include/linux/mfd/hisi_fmc.h

Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
---
 drivers/mtd/spi-nor/hisi-sfc.c | 86 +++---------------------------------------
 1 file changed, 6 insertions(+), 80 deletions(-)

diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
index 20378b0..7f455f4 100644
--- a/drivers/mtd/spi-nor/hisi-sfc.c
+++ b/drivers/mtd/spi-nor/hisi-sfc.c
@@ -16,80 +16,17 @@
  * You should have received a copy of the GNU General Public License
  * along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
-#include <linux/bitops.h>
 #include <linux/clk.h>
 #include <linux/dma-mapping.h>
 #include <linux/iopoll.h>
 #include <linux/module.h>
+#include <linux/mfd/hisi_fmc.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/spi-nor.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 
-/* Hardware register offsets and field definitions */
-#define FMC_CFG				0x00
-#define FMC_CFG_OP_MODE_MASK		BIT_MASK(0)
-#define FMC_CFG_OP_MODE_BOOT		0
-#define FMC_CFG_OP_MODE_NORMAL		1
-#define FMC_CFG_FLASH_SEL(type)		(((type) & 0x3) << 1)
-#define FMC_CFG_FLASH_SEL_MASK		0x6
-#define FMC_ECC_TYPE(type)		(((type) & 0x7) << 5)
-#define FMC_ECC_TYPE_MASK		GENMASK(7, 5)
-#define SPI_NOR_ADDR_MODE_MASK		BIT_MASK(10)
-#define SPI_NOR_ADDR_MODE_3BYTES	(0x0 << 10)
-#define SPI_NOR_ADDR_MODE_4BYTES	(0x1 << 10)
-#define FMC_GLOBAL_CFG			0x04
-#define FMC_GLOBAL_CFG_WP_ENABLE	BIT(6)
-#define FMC_SPI_TIMING_CFG		0x08
-#define TIMING_CFG_TCSH(nr)		(((nr) & 0xf) << 8)
-#define TIMING_CFG_TCSS(nr)		(((nr) & 0xf) << 4)
-#define TIMING_CFG_TSHSL(nr)		((nr) & 0xf)
-#define CS_HOLD_TIME			0x6
-#define CS_SETUP_TIME			0x6
-#define CS_DESELECT_TIME		0xf
-#define FMC_INT				0x18
-#define FMC_INT_OP_DONE			BIT(0)
-#define FMC_INT_CLR			0x20
-#define FMC_CMD				0x24
-#define FMC_CMD_CMD1(cmd)		((cmd) & 0xff)
-#define FMC_ADDRL			0x2c
-#define FMC_OP_CFG			0x30
-#define OP_CFG_FM_CS(cs)		((cs) << 11)
-#define OP_CFG_MEM_IF_TYPE(type)	(((type) & 0x7) << 7)
-#define OP_CFG_ADDR_NUM(addr)		(((addr) & 0x7) << 4)
-#define OP_CFG_DUMMY_NUM(dummy)		((dummy) & 0xf)
-#define FMC_DATA_NUM			0x38
-#define FMC_DATA_NUM_CNT(cnt)		((cnt) & GENMASK(13, 0))
-#define FMC_OP				0x3c
-#define FMC_OP_DUMMY_EN			BIT(8)
-#define FMC_OP_CMD1_EN			BIT(7)
-#define FMC_OP_ADDR_EN			BIT(6)
-#define FMC_OP_WRITE_DATA_EN		BIT(5)
-#define FMC_OP_READ_DATA_EN		BIT(2)
-#define FMC_OP_READ_STATUS_EN		BIT(1)
-#define FMC_OP_REG_OP_START		BIT(0)
-#define FMC_DMA_LEN			0x40
-#define FMC_DMA_LEN_SET(len)		((len) & GENMASK(27, 0))
-#define FMC_DMA_SADDR_D0		0x4c
-#define HIFMC_DMA_MAX_LEN		(4096)
-#define HIFMC_DMA_MASK			(HIFMC_DMA_MAX_LEN - 1)
-#define FMC_OP_DMA			0x68
-#define OP_CTRL_RD_OPCODE(code)		(((code) & 0xff) << 16)
-#define OP_CTRL_WR_OPCODE(code)		(((code) & 0xff) << 8)
-#define OP_CTRL_RW_OP(op)		((op) << 1)
-#define OP_CTRL_DMA_OP_READY		BIT(0)
-#define FMC_OP_READ			0x0
-#define FMC_OP_WRITE			0x1
-#define FMC_WAIT_TIMEOUT		1000000
-
-enum hifmc_iftype {
-	IF_TYPE_STD,
-	IF_TYPE_DUAL,
-	IF_TYPE_DIO,
-	IF_TYPE_QUAD,
-	IF_TYPE_QIO,
-};
 
 struct hifmc_priv {
 	u32 chipselect;
@@ -97,7 +34,6 @@ struct hifmc_priv {
 	struct hifmc_host *host;
 };
 
-#define HIFMC_MAX_CHIP_NUM		2
 struct hifmc_host {
 	struct device *dev;
 	struct mutex lock;
@@ -412,7 +348,7 @@ fail:
 static int hisi_spi_nor_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct resource *res;
+	struct hisi_fmc *fmc = dev_get_drvdata(dev->parent);
 	struct hifmc_host *host;
 	int ret;
 
@@ -423,19 +359,10 @@ static int hisi_spi_nor_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, host);
 	host->dev = dev;
 
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control");
-	host->regbase = devm_ioremap_resource(dev, res);
-	if (IS_ERR(host->regbase))
-		return PTR_ERR(host->regbase);
-
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "memory");
-	host->iobase = devm_ioremap_resource(dev, res);
-	if (IS_ERR(host->iobase))
-		return PTR_ERR(host->iobase);
-
-	host->clk = devm_clk_get(dev, NULL);
-	if (IS_ERR(host->clk))
-		return PTR_ERR(host->clk);
+	host->regbase = fmc->regbase;
+	host->iobase = fmc->iobase;
+	host->clk = fmc->clk;
+	host->lock = fmc->lock;
 
 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 	if (ret) {
@@ -448,7 +375,6 @@ static int hisi_spi_nor_probe(struct platform_device *pdev)
 	if (!host->buffer)
 		return -ENOMEM;
 
-	mutex_init(&host->lock);
 	clk_prepare_enable(host->clk);
 	hisi_spi_nor_init(host);
 	ret = hisi_spi_nor_register_all(host);
-- 
2.3.7

[PATCH 2/2] mtd: spi nor: gets resource from HiSilicon Flash Memory Controller driver

[linshunquan 00354166]

From: Shunquan Lin <linshunquan1@hisilicon.com>

As the HiSilicon Flash Memory Controller(FMC) driver is a Multi-
function device drivers(MFD) that not only support spi-nor flash
controller, but spi-nand and nand, so moves the register map of
HiSilicon spi-nor flash controller driver to
include/linux/mfd/hisi_fmc.h

Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
---
 drivers/mtd/spi-nor/hisi-sfc.c | 86 +++---------------------------------------
 1 file changed, 6 insertions(+), 80 deletions(-)

diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
index 20378b0..7f455f4 100644
--- a/drivers/mtd/spi-nor/hisi-sfc.c
+++ b/drivers/mtd/spi-nor/hisi-sfc.c
@@ -16,80 +16,17 @@
  * You should have received a copy of the GNU General Public License
  * along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
-#include <linux/bitops.h>
 #include <linux/clk.h>
 #include <linux/dma-mapping.h>
 #include <linux/iopoll.h>
 #include <linux/module.h>
+#include <linux/mfd/hisi_fmc.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/spi-nor.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 
-/* Hardware register offsets and field definitions */
-#define FMC_CFG				0x00
-#define FMC_CFG_OP_MODE_MASK		BIT_MASK(0)
-#define FMC_CFG_OP_MODE_BOOT		0
-#define FMC_CFG_OP_MODE_NORMAL		1
-#define FMC_CFG_FLASH_SEL(type)		(((type) & 0x3) << 1)
-#define FMC_CFG_FLASH_SEL_MASK		0x6
-#define FMC_ECC_TYPE(type)		(((type) & 0x7) << 5)
-#define FMC_ECC_TYPE_MASK		GENMASK(7, 5)
-#define SPI_NOR_ADDR_MODE_MASK		BIT_MASK(10)
-#define SPI_NOR_ADDR_MODE_3BYTES	(0x0 << 10)
-#define SPI_NOR_ADDR_MODE_4BYTES	(0x1 << 10)
-#define FMC_GLOBAL_CFG			0x04
-#define FMC_GLOBAL_CFG_WP_ENABLE	BIT(6)
-#define FMC_SPI_TIMING_CFG		0x08
-#define TIMING_CFG_TCSH(nr)		(((nr) & 0xf) << 8)
-#define TIMING_CFG_TCSS(nr)		(((nr) & 0xf) << 4)
-#define TIMING_CFG_TSHSL(nr)		((nr) & 0xf)
-#define CS_HOLD_TIME			0x6
-#define CS_SETUP_TIME			0x6
-#define CS_DESELECT_TIME		0xf
-#define FMC_INT				0x18
-#define FMC_INT_OP_DONE			BIT(0)
-#define FMC_INT_CLR			0x20
-#define FMC_CMD				0x24
-#define FMC_CMD_CMD1(cmd)		((cmd) & 0xff)
-#define FMC_ADDRL			0x2c
-#define FMC_OP_CFG			0x30
-#define OP_CFG_FM_CS(cs)		((cs) << 11)
-#define OP_CFG_MEM_IF_TYPE(type)	(((type) & 0x7) << 7)
-#define OP_CFG_ADDR_NUM(addr)		(((addr) & 0x7) << 4)
-#define OP_CFG_DUMMY_NUM(dummy)		((dummy) & 0xf)
-#define FMC_DATA_NUM			0x38
-#define FMC_DATA_NUM_CNT(cnt)		((cnt) & GENMASK(13, 0))
-#define FMC_OP				0x3c
-#define FMC_OP_DUMMY_EN			BIT(8)
-#define FMC_OP_CMD1_EN			BIT(7)
-#define FMC_OP_ADDR_EN			BIT(6)
-#define FMC_OP_WRITE_DATA_EN		BIT(5)
-#define FMC_OP_READ_DATA_EN		BIT(2)
-#define FMC_OP_READ_STATUS_EN		BIT(1)
-#define FMC_OP_REG_OP_START		BIT(0)
-#define FMC_DMA_LEN			0x40
-#define FMC_DMA_LEN_SET(len)		((len) & GENMASK(27, 0))
-#define FMC_DMA_SADDR_D0		0x4c
-#define HIFMC_DMA_MAX_LEN		(4096)
-#define HIFMC_DMA_MASK			(HIFMC_DMA_MAX_LEN - 1)
-#define FMC_OP_DMA			0x68
-#define OP_CTRL_RD_OPCODE(code)		(((code) & 0xff) << 16)
-#define OP_CTRL_WR_OPCODE(code)		(((code) & 0xff) << 8)
-#define OP_CTRL_RW_OP(op)		((op) << 1)
-#define OP_CTRL_DMA_OP_READY		BIT(0)
-#define FMC_OP_READ			0x0
-#define FMC_OP_WRITE			0x1
-#define FMC_WAIT_TIMEOUT		1000000
-
-enum hifmc_iftype {
-	IF_TYPE_STD,
-	IF_TYPE_DUAL,
-	IF_TYPE_DIO,
-	IF_TYPE_QUAD,
-	IF_TYPE_QIO,
-};
 
 struct hifmc_priv {
 	u32 chipselect;
@@ -97,7 +34,6 @@ struct hifmc_priv {
 	struct hifmc_host *host;
 };
 
-#define HIFMC_MAX_CHIP_NUM		2
 struct hifmc_host {
 	struct device *dev;
 	struct mutex lock;
@@ -412,7 +348,7 @@ fail:
 static int hisi_spi_nor_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct resource *res;
+	struct hisi_fmc *fmc = dev_get_drvdata(dev->parent);
 	struct hifmc_host *host;
 	int ret;
 
@@ -423,19 +359,10 @@ static int hisi_spi_nor_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, host);
 	host->dev = dev;
 
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control");
-	host->regbase = devm_ioremap_resource(dev, res);
-	if (IS_ERR(host->regbase))
-		return PTR_ERR(host->regbase);
-
-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "memory");
-	host->iobase = devm_ioremap_resource(dev, res);
-	if (IS_ERR(host->iobase))
-		return PTR_ERR(host->iobase);
-
-	host->clk = devm_clk_get(dev, NULL);
-	if (IS_ERR(host->clk))
-		return PTR_ERR(host->clk);
+	host->regbase = fmc->regbase;
+	host->iobase = fmc->iobase;
+	host->clk = fmc->clk;
+	host->lock = fmc->lock;
 
 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 	if (ret) {
@@ -448,7 +375,6 @@ static int hisi_spi_nor_probe(struct platform_device *pdev)
 	if (!host->buffer)
 		return -ENOMEM;
 
-	mutex_init(&host->lock);
 	clk_prepare_enable(host->clk);
 	hisi_spi_nor_init(host);
 	ret = hisi_spi_nor_register_all(host);
-- 
2.3.7


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

Re: [PATCH 2/2] mtd: spi nor: gets resource from HiSilicon Flash Memory Controller driver

[Arnd Bergmann]

On Friday 30 September 2016, linshunquan 00354166 wrote:
> 
> From: Shunquan Lin <linshunquan1@hisilicon.com>
> 
> As the HiSilicon Flash Memory Controller(FMC) driver is a Multi-
> function device drivers(MFD) that not only support spi-nor flash
> controller, but spi-nand and nand, so moves the register map of
> HiSilicon spi-nor flash controller driver to
> include/linux/mfd/hisi_fmc.h
> 
> Signed-off-by: Shunquan Lin <linshunquan1@hisilicon.com>
> ---
>  drivers/mtd/spi-nor/hisi-sfc.c | 86 +++---------------------------------------
>  1 file changed, 6 insertions(+), 80 deletions(-)

The patch seems incomplete, maybe forgot "git add" after a rebase?

	Arnd