From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Cc: Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 2/5] pwm: Add Allwinner A31 SoC support
Date: Tue, 11 Oct 2016 14:45:52 +0200 [thread overview]
Message-ID: <20161011124552.GX3462@lukather> (raw)
In-Reply-To: <20161011063449.54775-2-icenowy-ymACFijhrKM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 952 bytes --]
Hi,
On Tue, Oct 11, 2016 at 02:34:46PM +0800, Icenowy Zheng wrote:
> This adds a generic PWM framework driver for the PWM controller found
> on Allwinner A31 and A31s SoCs.
>
> The PWM controller is different with other Allwinner SoCs, with a
> control register per channel (in other SoCs the control register is
> shared), and each channel are allocated 16 bytes of address (but only 8
> bytes are used.)
>
> In order to use the driver for all channels, device nodes should be
> created per channel.
I don't think there's any need for a new driver that duplicates most
of the logic. The bitfields look roughly the same, and the only
difference is the split difference.
This is something that can easily be handled without creating a new
driver using regmap's reg_field, or through an intermediate functino
that returns the register offset.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Icenowy Zheng <icenowy@aosc.xyz>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Russell King <linux@armlinux.org.uk>,
linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH 2/5] pwm: Add Allwinner A31 SoC support
Date: Tue, 11 Oct 2016 14:45:52 +0200 [thread overview]
Message-ID: <20161011124552.GX3462@lukather> (raw)
In-Reply-To: <20161011063449.54775-2-icenowy@aosc.xyz>
[-- Attachment #1: Type: text/plain, Size: 981 bytes --]
Hi,
On Tue, Oct 11, 2016 at 02:34:46PM +0800, Icenowy Zheng wrote:
> This adds a generic PWM framework driver for the PWM controller found
> on Allwinner A31 and A31s SoCs.
>
> The PWM controller is different with other Allwinner SoCs, with a
> control register per channel (in other SoCs the control register is
> shared), and each channel are allocated 16 bytes of address (but only 8
> bytes are used.)
>
> In order to use the driver for all channels, device nodes should be
> created per channel.
I don't think there's any need for a new driver that duplicates most
of the logic. The bitfields look roughly the same, and the only
difference is the split difference.
This is something that can easily be handled without creating a new
driver using regmap's reg_field, or through an intermediate functino
that returns the register offset.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]
next prev parent reply other threads:[~2016-10-11 12:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-11 6:34 [PATCH 1/5] dt-bindings: add binding for Allwinner sun6i(A31) PWM controller Icenowy Zheng
[not found] ` <20161011063449.54775-1-icenowy-ymACFijhrKM@public.gmane.org>
2016-10-11 6:34 ` [PATCH 2/5] pwm: Add Allwinner A31 SoC support Icenowy Zheng
[not found] ` <20161011063449.54775-2-icenowy-ymACFijhrKM@public.gmane.org>
2016-10-11 9:02 ` LABBE Corentin
2016-10-11 9:02 ` [linux-sunxi] " LABBE Corentin
2016-10-11 12:45 ` Maxime Ripard [this message]
2016-10-11 12:45 ` Maxime Ripard
2016-10-11 6:34 ` [PATCH 3/5] ARM: dts: sun6i: add PWM controller Icenowy Zheng
2016-10-11 6:34 ` [PATCH 4/5] ARM: dts: sun6i: add pinmux for PWM0 Icenowy Zheng
2016-10-11 6:34 ` [PATCH 5/5] ARM: dts: sun6i: add pwm backlight for reference design tablet Icenowy Zheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161011124552.GX3462@lukather \
--to=maxime.ripard-wi1+55scjutkeb57/3fjtnbpr1lh4cv8@public.gmane.org \
--cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=icenowy-ymACFijhrKM@public.gmane.org \
--cc=linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org \
--cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org \
--cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
--cc=thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
--cc=wens-jdAy2FN1RRM@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.