From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip
Date: Thu, 13 Oct 2016 11:24:07 +1100 [thread overview]
Message-ID: <20161013002407.GG18039@umbus.fritz.box> (raw)
In-Reply-To: <28a5eb21-bea5-09f9-6f90-9770812700e1@kaod.org>
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On Wed, Oct 12, 2016 at 10:53:12AM +0200, Cédric Le Goater wrote:
> On 10/11/2016 12:24 PM, David Gibson wrote:
> > On Mon, Oct 10, 2016 at 02:56:25PM +0200, Cédric Le Goater wrote:
> >>
> >>>> @@ -227,11 +227,44 @@ static void ppc_powernv_init(MachineState *machine)
> >>>> snprintf(chip_name, sizeof(chip_name), "chip[%d]", CHIP_HWID(i));
> >>>> object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
> >>>> object_property_set_int(chip, CHIP_HWID(i), "chip-id", &error_fatal);
> >>>> + object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
> >>>> + /*
> >>>> + * We could customize cores_mask for the chip here. May be
> >>>> + * using a powernv machine property, like 'num-chips'. Let the
> >>>> + * chip choose the default for now.
> >>>
> >>> I don't think you need any special mechanism for this. If you just
> >>> remove this explicit assignment the chip default will apply, but the
> >>> user can alter it using -global.
> >>
> >> Using a command line with :
> >>
> >> -global powernv-chip-POWER8.cores-mask=0x7070
> >>
> >> would work for one chip but not for more. Let's start with that, I will
> >> remove the comment for now. multiple chip is for later.
> >
> > Well, it works for more than one chip if you want the same mask for
> > each of them. If you want different masks, I think you can still do
> > it with -set, but working out the right arguments can be a PITA.
>
> That would be the best solution but I did not find a way to address one
> chip object to do a "qom set".
Yeah, that's what I mean working out the arguments can be tricky.
>
> (qemu) info qom-tree
> /machine (powernv-machine)
> /unattached (container)
> /system[0] (qemu:memory-region)
> /sysbus (System)
> /ppc_powernv.ram[0] (qemu:memory-region)
> /io[0] (qemu:memory-region)
> /peripheral-anon (container)
> /peripheral (container)
> /chip[1] (powernv-chip-POWER8)
> ...
> /chip[0] (powernv-chip-POWER8)
> ...
>
> We will have a similar need with the ram to spread the contents on
> the chips.
Sure. Let's cross these bridges when we come to them.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2016-10-13 5:15 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-03 7:24 [Qemu-devel] [PATCH v4 00/20] ppc/pnv: booting the kernel and reaching user space Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 01/20] ppc/pnv: add skeleton PowerNV platform Cédric Le Goater
2016-10-07 4:14 ` David Gibson
2016-10-07 4:16 ` David Gibson
2016-10-07 7:38 ` Cédric Le Goater
2016-10-07 16:29 ` Jeff Cody
2016-10-07 8:36 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 02/20] ppc/pnv: add a PnvChip object Cédric Le Goater
2016-10-07 4:26 ` David Gibson
2016-10-07 9:16 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 03/20] ppc/pnv: add a core mask to PnvChip Cédric Le Goater
2016-10-07 4:32 ` David Gibson
2016-10-07 5:01 ` Benjamin Herrenschmidt
2016-10-07 5:11 ` David Gibson
2016-10-07 8:24 ` Cédric Le Goater
2016-10-10 12:56 ` Cédric Le Goater
2016-10-11 10:24 ` David Gibson
2016-10-12 8:53 ` Cédric Le Goater
2016-10-13 0:24 ` David Gibson [this message]
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 04/20] ppc/pnv: add a PIR handler " Cédric Le Goater
2016-10-07 4:34 ` David Gibson
2016-10-10 8:14 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 05/20] ppc/pnv: add a PnvCore object Cédric Le Goater
2016-10-07 4:52 ` David Gibson
2016-10-10 8:07 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 06/20] ppc/pnv: add XSCOM infrastructure Cédric Le Goater
2016-10-13 0:41 ` David Gibson
2016-10-13 6:26 ` Cédric Le Goater
2016-11-07 8:26 ` Olaf Hering
2016-11-07 8:32 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 07/20] ppc/pnv: add XSCOM handlers to PnvCore Cédric Le Goater
2016-10-13 0:51 ` David Gibson
2016-10-13 6:50 ` Cédric Le Goater
2016-10-13 22:24 ` David Gibson
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 08/20] ppc/pnv: add a LPC controller Cédric Le Goater
2016-10-13 2:52 ` David Gibson
2016-10-13 2:53 ` David Gibson
2016-10-13 6:31 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 09/20] ppc/pnv: add a ISA bus Cédric Le Goater
2016-10-13 2:58 ` David Gibson
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 10/20] ppc/xics: Make the ICSState a list Cédric Le Goater
2016-10-14 5:32 ` David Gibson
2016-10-14 7:35 ` Cédric Le Goater
2016-10-16 23:53 ` David Gibson
2016-10-17 8:13 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 11/20] ppc/xics: Split ICS into ics-base and ics class Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 12/20] ppc/xics: Add xics to the monitor "info pic" command Cédric Le Goater
2016-10-14 5:30 ` David Gibson
2016-10-14 7:39 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 13/20] ppc/xics: introduce helpers to find an ICP from some (CPU) index Cédric Le Goater
2016-10-14 5:34 ` David Gibson
2016-10-14 7:44 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 14/20] ppc/xics: introduce a helper to insert a new ics Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 15/20] ppc/xics: Add "native" XICS subclass Cédric Le Goater
2016-10-14 6:10 ` David Gibson
2016-10-14 9:40 ` Cédric Le Goater
2016-10-16 23:51 ` David Gibson
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 16/20] ppc/pnv: add a XICS native to each PowerNV chip Cédric Le Goater
2016-10-14 6:18 ` David Gibson
2016-10-18 14:47 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 17/20] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt Cédric Le Goater
2016-10-14 6:32 ` David Gibson
2016-10-14 7:13 ` Benjamin Herrenschmidt
2016-10-14 8:07 ` Cédric Le Goater
2016-10-16 23:52 ` David Gibson
2016-10-17 8:17 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 18/20] ppc/pnv: Add OCC model stub with interrupt support Cédric Le Goater
2016-10-14 6:34 ` David Gibson
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 19/20] ppc/pnv: Add Naples chip support for LPC interrupts Cédric Le Goater
2016-10-14 6:36 ` David Gibson
2016-10-14 7:47 ` Cédric Le Goater
2016-10-03 7:24 ` [Qemu-devel] [PATCH v4 20/20] ppc/pnv: add support for POWER9 LPC Controller Cédric Le Goater
2016-10-14 6:43 ` David Gibson
2016-10-03 7:59 ` [Qemu-devel] [PATCH v4 00/20] ppc/pnv: booting the kernel and reaching user space no-reply
2016-10-03 8:21 ` Cédric Le Goater
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