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From: atull@opensource.altera.com (Alan Tull)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v20 03/10] add bindings document for altera freeze bridge
Date: Mon, 17 Oct 2016 11:09:34 -0500	[thread overview]
Message-ID: <20161017160941.4205-4-atull@opensource.altera.com> (raw)
In-Reply-To: <20161017160941.4205-1-atull@opensource.altera.com>

Add bindings document for the Altera Freeze Bridge.  A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed.  The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
---
v19: Added in v19 of patchset, uses fpga image info struct
v20: fix one underscore to hyphen
---
 .../bindings/fpga/altera-freeze-bridge.txt         | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
new file mode 100644
index 0000000..f8e288c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
@@ -0,0 +1,23 @@
+Altera Freeze Bridge Controller Driver
+
+The Altera Freeze Bridge Controller manages one or more freeze bridges.
+The controller can freeze/disable the bridges which prevents signal
+changes from passing through the bridge.  The controller can also
+unfreeze/enable the bridges which allows traffic to pass through the
+bridge normally.
+
+Required properties:
+- compatible		: Should contain "altr,freeze-bridge-controller"
+- regs			: base address and size for freeze bridge module
+
+Optional properties:
+- bridge-enable		: 0 if driver should disable bridge at startup
+			  1 if driver should enable bridge at startup
+			  Default is to leave bridge in current state.
+
+Example:
+	freeze-controller at 100000450 {
+		compatible = "altr,freeze-bridge-controller";
+		regs = <0x1000 0x10>;
+		bridge-enable = <0>;
+	};
-- 
2.10.1

WARNING: multiple messages have this Message-ID (diff)
From: Alan Tull <atull@opensource.altera.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Moritz Fischer <moritz.fischer@ettus.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Jon Masters <jcm@redhat.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Cyril Chemparathy <cyril.chemparathy@xilinx.com>,
	Matthew Gerlach <mgerlach@opensource.altera.com>,
	Dinh Nguyen <dinguyen@opensource.altera.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, delicious.quinoa@gmail.com,
	Alan Tull <atull@opensource.altera.com>
Subject: [PATCH v20 03/10] add bindings document for altera freeze bridge
Date: Mon, 17 Oct 2016 11:09:34 -0500	[thread overview]
Message-ID: <20161017160941.4205-4-atull@opensource.altera.com> (raw)
In-Reply-To: <20161017160941.4205-1-atull@opensource.altera.com>

Add bindings document for the Altera Freeze Bridge.  A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed.  The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
---
v19: Added in v19 of patchset, uses fpga image info struct
v20: fix one underscore to hyphen
---
 .../bindings/fpga/altera-freeze-bridge.txt         | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
new file mode 100644
index 0000000..f8e288c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
@@ -0,0 +1,23 @@
+Altera Freeze Bridge Controller Driver
+
+The Altera Freeze Bridge Controller manages one or more freeze bridges.
+The controller can freeze/disable the bridges which prevents signal
+changes from passing through the bridge.  The controller can also
+unfreeze/enable the bridges which allows traffic to pass through the
+bridge normally.
+
+Required properties:
+- compatible		: Should contain "altr,freeze-bridge-controller"
+- regs			: base address and size for freeze bridge module
+
+Optional properties:
+- bridge-enable		: 0 if driver should disable bridge at startup
+			  1 if driver should enable bridge at startup
+			  Default is to leave bridge in current state.
+
+Example:
+	freeze-controller@100000450 {
+		compatible = "altr,freeze-bridge-controller";
+		regs = <0x1000 0x10>;
+		bridge-enable = <0>;
+	};
-- 
2.10.1

WARNING: multiple messages have this Message-ID (diff)
From: Alan Tull <atull@opensource.altera.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Moritz Fischer <moritz.fischer@ettus.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Jon Masters <jcm@redhat.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Jonathan Corbet <corbet@lwn.net>,
	"Cyril Chemparathy" <cyril.chemparathy@xilinx.com>,
	Matthew Gerlach <mgerlach@opensource.altera.com>,
	Dinh Nguyen <dinguyen@opensource.altera.com>,
	<devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <delicious.quinoa@gmail.com>,
	Alan Tull <atull@opensource.altera.com>
Subject: [PATCH v20 03/10] add bindings document for altera freeze bridge
Date: Mon, 17 Oct 2016 11:09:34 -0500	[thread overview]
Message-ID: <20161017160941.4205-4-atull@opensource.altera.com> (raw)
In-Reply-To: <20161017160941.4205-1-atull@opensource.altera.com>

Add bindings document for the Altera Freeze Bridge.  A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed.  The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
---
v19: Added in v19 of patchset, uses fpga image info struct
v20: fix one underscore to hyphen
---
 .../bindings/fpga/altera-freeze-bridge.txt         | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
new file mode 100644
index 0000000..f8e288c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
@@ -0,0 +1,23 @@
+Altera Freeze Bridge Controller Driver
+
+The Altera Freeze Bridge Controller manages one or more freeze bridges.
+The controller can freeze/disable the bridges which prevents signal
+changes from passing through the bridge.  The controller can also
+unfreeze/enable the bridges which allows traffic to pass through the
+bridge normally.
+
+Required properties:
+- compatible		: Should contain "altr,freeze-bridge-controller"
+- regs			: base address and size for freeze bridge module
+
+Optional properties:
+- bridge-enable		: 0 if driver should disable bridge at startup
+			  1 if driver should enable bridge at startup
+			  Default is to leave bridge in current state.
+
+Example:
+	freeze-controller@100000450 {
+		compatible = "altr,freeze-bridge-controller";
+		regs = <0x1000 0x10>;
+		bridge-enable = <0>;
+	};
-- 
2.10.1

  parent reply	other threads:[~2016-10-17 16:09 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-17 16:09 [PATCH v20 00/10] Device Tree support for FPGA Programming Alan Tull
2016-10-17 16:09 ` Alan Tull
2016-10-17 16:09 ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 01/10] fpga: add bindings document for fpga region Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 02/10] doc: fpga-mgr: add fpga image info to api Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 21:00   ` Moritz Fischer
2016-10-17 21:00     ` Moritz Fischer
2016-10-18 18:28     ` atull
2016-10-18 18:28       ` atull
2016-10-18 18:28       ` atull
2016-10-17 16:09 ` Alan Tull [this message]
2016-10-17 16:09   ` [PATCH v20 03/10] add bindings document for altera freeze bridge Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-18 16:26   ` Rob Herring
2016-10-18 16:26     ` Rob Herring
2016-10-18 18:34     ` atull
2016-10-18 18:34       ` atull
2016-10-18 18:34       ` atull
2016-10-17 16:09 ` [PATCH v20 04/10] add sysfs document for fpga bridge class Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 05/10] fpga-mgr: add fpga image information struct Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 06/10] fpga: add fpga bridge framework Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 20:25   ` atull
2016-10-17 20:25     ` atull
2016-10-17 20:25     ` atull
2016-10-17 16:09 ` [PATCH v20 07/10] fpga: fpga-region: device tree control for FPGA Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 08/10] ARM: socfpga: fpga bridge driver support Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 09/10] fpga: add altera freeze bridge support Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09 ` [PATCH v20 10/10] fpga-manager: Add Socfpga Arria10 support Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-17 16:09   ` Alan Tull
2016-10-18 21:01   ` Moritz Fischer
2016-10-18 21:01     ` Moritz Fischer
2016-10-19 15:49     ` atull
2016-10-19 15:49       ` atull
2016-10-19 15:49       ` atull

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