Re: [Qemu-devel] [PATCH v5 00/17] ppc/pnv: booting the kernel and reaching user space

[David Gibson <david@gibson.dropbear.id.au>]

[-- Attachment #1: Type: text/plain, Size: 5717 bytes --]

On Sat, Oct 22, 2016 at 11:46:33AM +0200, Cédric Le Goater wrote:
> Hello,
> 
> Here is the latest version of the ppc/pnv platform patchset. PowerNV
> (as Non-Virtualized) is the "baremetal" platform using the OPAL
> firmware. It runs Linux on IBM and Open Power systems and it can be
> used as an hypervisor OS, to run KVM guests, or simply as a host OS.
> The goal here is to add support for the baremetal platform and
> possibly later also for the KVM PR guests but not for HV guests.
> 
> In v5, all the comments from v4 should have been addressed. Most of
> the differences are cleanups suggested by David but there a couple of
> important changes :
> 
>  - an addition of a new firmware to qemu : skiboot 5.3.7.
>  - a rework of the native Interrupt Presentation Controller model
>    which now uses memory subregions instead of a hash table.   
>  - a removal of the Power9 LPC Controller. This is still in the plans
>    but the models need a little more work.
> 
> 
> The initial patches provide a minimal platform with some RAM to load
> the ROMs : firmware, kernel and initrd. The device tree is built with
> what is available at reset time. Then, comes the PnvChip object acting
> as a container for other devices required to run a system. The cores
> are added to each chip with some restrictions on the number and the
> ids. Next is the XSCOM model, the sideband bus which gives controls to
> all the units in the POWER8 chip, the LPC controller for the console,
> the native interrupt controller and the PSI HB model to handle the
> external interrupt.
> 
> 
> The next step should be IPMI support which adds a BT device on the ISA
> bus and some device tree extensions to read sensors and FRUs. This is
> relatively straight forward and most of the IPMI code has been
> discussed already on the list. Then should come a PHB3 model to
> include some PCI devices. This is big and it needs a few helpers in
> the PCI core.

I've merged 1-6 into ppc-for-2.8.  The rest I'm still reviewing.

> 
> If you feel adventurous, you can grab kernel and rootfs images :
> 
>   https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/zImage.epapr
>   https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz
> 
> and give it a try. The full patchset is available here :
> 
>    https://github.com/legoater/qemu/commits/powernv-ipmi-2.8
> 
> This is a wip branch, which I stabilize when the qemu version, on
> which it is based, is released.
> 
> Thanks,
> 
> C. 
> 
> Benjamin Herrenschmidt (5):
>   ppc/pnv: add skeleton PowerNV platform
>   ppc/pnv: add a LPC controller
>   ppc/pnv: Add cut down PSI bridge model and hookup external interrupt
>   ppc/pnv: Add OCC model stub with interrupt support
>   ppc/pnv: Add Naples chip support for LPC interrupts
> 
> Cédric Le Goater (12):
>   ppc: add skiboot firmware for the pnv platform
>   ppc/pnv: add a PnvChip object
>   ppc/pnv: add a core mask to PnvChip
>   ppc/pnv: add a PIR handler to PnvChip
>   ppc/pnv: add a PnvCore object
>   ppc/pnv: add XSCOM infrastructure
>   ppc/pnv: add XSCOM handlers to PnvCore
>   ppc/pnv: add a ISA bus
>   ppc/xics: Add "native" XICS subclass
>   ppc/pnv: add a XICS native to each PowerNV chip
>   ppc/xics: add a xics_get_cpu_index_by_pir helper
>   ppc/xics: introduce a helper to insert a new ics
> 
>  .gitmodules                       |   3 +
>  MAINTAINERS                       |   1 +
>  Makefile                          |   2 +-
>  default-configs/ppc64-softmmu.mak |   4 +-
>  hw/intc/Makefile.objs             |   1 +
>  hw/intc/xics.c                    |   6 +
>  hw/intc/xics_native.c             | 323 ++++++++++++++
>  hw/ppc/Makefile.objs              |   2 +
>  hw/ppc/pnv.c                      | 888 ++++++++++++++++++++++++++++++++++++++
>  hw/ppc/pnv_core.c                 | 248 +++++++++++
>  hw/ppc/pnv_lpc.c                  | 514 ++++++++++++++++++++++
>  hw/ppc/pnv_occ.c                  | 135 ++++++
>  hw/ppc/pnv_psi.c                  | 615 ++++++++++++++++++++++++++
>  hw/ppc/pnv_xscom.c                | 277 ++++++++++++
>  include/hw/ppc/pnv.h              | 159 +++++++
>  include/hw/ppc/pnv_core.h         |  50 +++
>  include/hw/ppc/pnv_lpc.h          |  76 ++++
>  include/hw/ppc/pnv_occ.h          |  38 ++
>  include/hw/ppc/pnv_psi.h          |  64 +++
>  include/hw/ppc/pnv_xscom.h        |  84 ++++
>  include/hw/ppc/xics.h             |  26 ++
>  pc-bios/README                    |   5 +
>  pc-bios/skiboot.lid               | Bin 0 -> 983893 bytes
>  roms/Makefile                     |   8 +-
>  roms/skiboot                      |   1 +
>  25 files changed, 3527 insertions(+), 3 deletions(-)
>  create mode 100644 hw/intc/xics_native.c
>  create mode 100644 hw/ppc/pnv.c
>  create mode 100644 hw/ppc/pnv_core.c
>  create mode 100644 hw/ppc/pnv_lpc.c
>  create mode 100644 hw/ppc/pnv_occ.c
>  create mode 100644 hw/ppc/pnv_psi.c
>  create mode 100644 hw/ppc/pnv_xscom.c
>  create mode 100644 include/hw/ppc/pnv.h
>  create mode 100644 include/hw/ppc/pnv_core.h
>  create mode 100644 include/hw/ppc/pnv_lpc.h
>  create mode 100644 include/hw/ppc/pnv_occ.h
>  create mode 100644 include/hw/ppc/pnv_psi.h
>  create mode 100644 include/hw/ppc/pnv_xscom.h
>  create mode 100644 pc-bios/skiboot.lid
>  create mode 160000 roms/skiboot
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 819 bytes --]