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From: joserz@linux.vnet.ibm.com
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH] 3/4] target-ppc: Implement bcdcfz. instruction
Date: Thu, 27 Oct 2016 16:02:49 -0200	[thread overview]
Message-ID: <20161027180249.GC19890@pacoca> (raw)
In-Reply-To: <20161027013519.GC19918@umbus.fritz.box>

I'll send an improved version in v2.

Thank you for reviewing it.

On Thu, Oct 27, 2016 at 12:35:19PM +1100, David Gibson wrote:
> On Wed, Oct 26, 2016 at 11:18:57AM -0200, Jose Ricardo Ziviani wrote:
> > bcdcfz. converts from Zoned numeric format to BCD. Zoned format uses
> > a byte to represent a digit where the most significant nibble is 0x3
> > or 0xf, depending on the preferred signal.
> > 
> > Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
> > ---
> >  target-ppc/helper.h                 |  1 +
> >  target-ppc/int_helper.c             | 55 +++++++++++++++++++++++++++++++++++++
> >  target-ppc/translate/vmx-impl.inc.c |  7 +++--
> >  3 files changed, 61 insertions(+), 2 deletions(-)
> > 
> > diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> > index 92eaaf0..f460635 100644
> > --- a/target-ppc/helper.h
> > +++ b/target-ppc/helper.h
> > @@ -371,6 +371,7 @@ DEF_HELPER_4(bcdadd, i32, avr, avr, avr, i32)
> >  DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
> >  DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
> >  DEF_HELPER_2(bcdctn, i32, avr, avr)
> > +DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
> >  
> >  DEF_HELPER_2(xsadddp, void, env, i32)
> >  DEF_HELPER_2(xssubdp, void, env, i32)
> > diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> > index cffe82c..8cbbdfc 100644
> > --- a/target-ppc/int_helper.c
> > +++ b/target-ppc/int_helper.c
> > @@ -2459,6 +2459,17 @@ static int bcd_preferred_sgn(int sgn, int ps)
> >      }
> >  }
> >  
> > +static uint8_t get_nibble(ppc_avr_t *bcd, int n)
> > +{
> > +    uint8_t result;
> > +    if (!(n & 1)) {
> > +        result = bcd->u8[BCD_DIG_BYTE(n)] & 0xF;
> > +    } else {
> > +       result = bcd->u8[BCD_DIG_BYTE(n)] >> 4;
> > +    }
> > +    return result;
> > +}
> 
> This can be merged with bcd_get_digit() without too much effort.
> 
> >  static uint8_t bcd_get_digit(ppc_avr_t *bcd, int n, int *invalid)
> >  {
> >      uint8_t result;
> > @@ -2713,6 +2724,50 @@ uint32_t helper_bcdctn(ppc_avr_t *r, ppc_avr_t *b)
> >      return cr;
> >  }
> >  
> > +uint32_t helper_bcdcfz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
> > +{
> > +    int i;
> > +    int j = 0;
> > +    int cr = 0;
> > +    int invalid = 0;
> > +    int eq_flag = 0;
> > +    int zone_digit = 0;
> > +    ppc_avr_t ret = { .u64 = { 0, 0 } };
> > +    int sgnb = get_nibble(b, 1);
> > +
> > +    if (unlikely(((sgnb < 0xA) && ps) ||
> > +                ((get_nibble(b, 0) > 0x9) && !ps))) {
> 
> The second half of this condition doesn't belong here.  It's a
> requirement for both ps values, and would make more sense applied
> along with the same test on the other digits.
> 
> > +        invalid = 1;
> > +    }
> > +
> > +    for (i = 31, j = 16; i > 1; i -= 2, j--) {
> 
> I don't see why you're doing this in reverse order.
> 
> > +        zone_digit = get_nibble(b, i);
> > +        if (unlikely((ps && zone_digit != 0xF) ||
> > +                    (!ps && zone_digit != 0x3))) {
> > +            invalid = 1;
> 
> In this and the other instructions it would make sense to break out of
> the function as soon as you detect an invalid encoding.
> 
> > +        }
> 
> You never check for invalid encoding in the low input nibble
> (i.e. value > 0x9).
> 
> > +        eq_flag += zone_digit;
> 
> What?? How on earth does adding up the zone digits help you.  For a
> valid encoding the answer should always be either 0x2d (PS=0) or 0xe1
> (PS=1).
> 
> > +        bcd_put_digit(&ret, get_nibble(b, i - 1), j);
> > +    }
> > +    bcd_put_digit(&ret, get_nibble(b, 0), 1);
> > +
> > +    if ((ps && (sgnb == 0xB || sgnb == 0xD)) ||
> > +            (!ps && (sgnb & 0x4))) {
> > +        bcd_put_digit(&ret, BCD_NEG_PREF, 0);
> > +        cr = (!eq_flag) ? 1 << CRF_LT : 1 << CRF_EQ;
> > +    } else {
> > +        bcd_put_digit(&ret, BCD_PLUS_PREF_1, 0);
> > +        cr = (!eq_flag) ? 1 << CRF_GT : 1 << CRF_EQ;
> > +    }
> > +
> > +    if (unlikely(invalid)) {
> > +        cr = 1 << CRF_SO;
> > +    }
> > +
> > +    *r = ret;
> > +    return cr;
> > +}
> >  void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
> >  {
> >      int i;
> > diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c
> > index 4364881..9192f8f 100644
> > --- a/target-ppc/translate/vmx-impl.inc.c
> > +++ b/target-ppc/translate/vmx-impl.inc.c
> > @@ -917,6 +917,7 @@ GEN_BCD(bcdadd)
> >  GEN_BCD(bcdsub)
> >  GEN_BCD2(bcdcfn)
> >  GEN_BCD3(bcdctn)
> > +GEN_BCD2(bcdcfz)
> >  
> >  static void gen_xpnd04_1(DisasContext *ctx)
> >  {
> > @@ -931,7 +932,8 @@ static void gen_xpnd04_1(DisasContext *ctx)
> >          gen_bcdctn(ctx);
> >          break;
> >      case 6:
> > -        break; /* bcdcfz. */
> > +        gen_bcdcfz(ctx);
> > +        break;
> >      case 7:
> >          gen_bcdcfn(ctx);
> >          break;
> > @@ -952,7 +954,8 @@ static void gen_xpnd04_2(DisasContext *ctx)
> >      case 4:
> >          break; /* bcdctz. */
> >      case 6:
> > -        break; /* bcdcfz. */
> > +        gen_bcdcfz(ctx);
> > +        break;
> >      case 7:
> >          gen_bcdcfn(ctx);
> >          break;
> 
> -- 
> David Gibson			| I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
> 				| _way_ _around_!
> http://www.ozlabs.org/~dgibson

  reply	other threads:[~2016-10-27 18:03 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-26 13:18 [Qemu-devel] [PATCH] 0/4] POWER9 TCG enablements - BCD functions part I Jose Ricardo Ziviani
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 1/4] target-ppc: Implement bcdcfn. instruction Jose Ricardo Ziviani
2016-10-27  1:05   ` David Gibson
2016-10-27 15:29     ` joserz
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 2/4] target-ppc: Implement bcdctn. instruction Jose Ricardo Ziviani
2016-10-27  1:20   ` David Gibson
2016-10-27 16:13     ` joserz
2016-10-31  0:16       ` David Gibson
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 3/4] target-ppc: Implement bcdcfz. instruction Jose Ricardo Ziviani
2016-10-27  1:35   ` David Gibson
2016-10-27 18:02     ` joserz [this message]
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 4/4] target-ppc: Implement bcdctz. instruction Jose Ricardo Ziviani
2016-10-27  1:47   ` David Gibson
2016-10-27 18:29     ` joserz
2016-10-27 20:08     ` [Qemu-devel] [Qemu-ppc] " joserz
2016-10-31  2:50       ` David Gibson

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