From: joserz@linux.vnet.ibm.com
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH] 4/4] target-ppc: Implement bcdctz. instruction
Date: Thu, 27 Oct 2016 16:29:44 -0200 [thread overview]
Message-ID: <20161027182944.GD19890@pacoca> (raw)
In-Reply-To: <20161027014734.GD19918@umbus.fritz.box>
Everything will be fixed in v2.
Thanks for reviewing it!
On Thu, Oct 27, 2016 at 12:47:34PM +1100, David Gibson wrote:
> On Wed, Oct 26, 2016 at 11:18:58AM -0200, Jose Ricardo Ziviani wrote:
> > bcdctz. converts from BCD to Zoned numeric format. Zoned format uses
> > a byte to represent a digit where the most significant nibble is 0x3
> > or 0xf, depending on the preferred signal.
> >
> > Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
> > ---
> > target-ppc/helper.h | 1 +
> > target-ppc/int_helper.c | 54 +++++++++++++++++++++++++++++++++++++
> > target-ppc/translate/vmx-impl.inc.c | 7 +++--
> > 3 files changed, 60 insertions(+), 2 deletions(-)
> >
> > diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> > index f460635..3b928b8 100644
> > --- a/target-ppc/helper.h
> > +++ b/target-ppc/helper.h
> > @@ -372,6 +372,7 @@ DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
> > DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
> > DEF_HELPER_2(bcdctn, i32, avr, avr)
> > DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
> > +DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
> >
> > DEF_HELPER_2(xsadddp, void, env, i32)
> > DEF_HELPER_2(xssubdp, void, env, i32)
> > diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> > index 8cbbdfc..e0a84bb 100644
> > --- a/target-ppc/int_helper.c
> > +++ b/target-ppc/int_helper.c
> > @@ -2768,6 +2768,60 @@ uint32_t helper_bcdcfz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
> > *r = ret;
> > return cr;
> > }
> > +
> > +uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
> > +{
> > + int i;
> > + int j;
> > + int cr = 0;
> > + int invalid = 0;
> > + uint8_t digit = 0;
> > + int sgnb = bcd_get_sgn(b);
> > + int zone_lead = (ps) ? 0xF0 : 0x30;
> > + ppc_avr_t ret = { .u64 = { 0, 0 } };
> > +
> > + int eq_flag = (b->u64[HI_IDX] == 0) && ((b->u64[LO_IDX] >> 4) == 0);
> > + int ox_flag = (b->u64[HI_IDX] != 0);
>
> This doesn't look right. The zoned format can accomodate 16 digits.
> The low word of the packed format can accomodate 15 digits + sign. So
> it should be possible to convert a packed for with a value in the low
> nibble of the upper word.
>
> > + for (i = 31, j = 16; i > 1; i -= 2, j--) {
>
> Again not seeing any point for the reverse order.
>
> > + digit = get_nibble(b, j);
> > + ret.u8[BCD_DIG_BYTE(i)] = zone_lead + digit;
> > +
> > + if (unlikely(digit > 9)) {
> > + invalid = 1;
> > + }
> > + }
> > +
> > + if (unlikely(!sgnb)) {
> > + sgnb = (!get_nibble(b, 0)) ? 1 : -1;
> > + }
>
> Doesn't bcd_get_sgn() returning 0 indicate a badly encoded sign
> point. In which case you should set invalid, rather than making up a
> sign according to this apparently arbitrary scheme.
>
> > +
> > + if (ps) {
> > + bcd_put_digit(&ret, (sgnb == 1) ? 0xC : 0xD, 1);
> > + } else {
> > + bcd_put_digit(&ret, (sgnb == 1) ? 0x3 : 0x7, 1);
> > + }
> > + bcd_put_digit(&ret, get_nibble(b, 1), 0);
> > +
> > + if (!eq_flag) {
> > + cr = (sgnb == 1) ? 1 << CRF_GT : 1 << CRF_LT;
> > + } else {
> > + cr = 1 << CRF_EQ;
> > + }
> > +
> > + if (ox_flag) {
> > + cr |= 1 << CRF_SO;
> > + }
> > +
> > + if (unlikely(invalid)) {
> > + cr = 1 << CRF_SO;
> > + }
> > +
> > + *r = ret;
> > +
> > + return cr;
> > +}
> > +
> > void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
> > {
> > int i;
> > diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c
> > index 9192f8f..62c44f0 100644
> > --- a/target-ppc/translate/vmx-impl.inc.c
> > +++ b/target-ppc/translate/vmx-impl.inc.c
> > @@ -918,6 +918,7 @@ GEN_BCD(bcdsub)
> > GEN_BCD2(bcdcfn)
> > GEN_BCD3(bcdctn)
> > GEN_BCD2(bcdcfz)
> > +GEN_BCD2(bcdctz)
> >
> > static void gen_xpnd04_1(DisasContext *ctx)
> > {
> > @@ -927,7 +928,8 @@ static void gen_xpnd04_1(DisasContext *ctx)
> > case 2:
> > break; /* bcdcfsq. */
> > case 4:
> > - break; /* bcdctz. */
> > + gen_bcdctz(ctx);
> > + break;
> > case 5:
> > gen_bcdctn(ctx);
> > break;
> > @@ -952,7 +954,8 @@ static void gen_xpnd04_2(DisasContext *ctx)
> > case 2:
> > break; /* bcdcfsq. */
> > case 4:
> > - break; /* bcdctz. */
> > + gen_bcdctz(ctx);
> > + break;
> > case 6:
> > gen_bcdcfz(ctx);
> > break;
>
> --
> David Gibson | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
> | _way_ _around_!
> http://www.ozlabs.org/~dgibson
next prev parent reply other threads:[~2016-10-27 18:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-26 13:18 [Qemu-devel] [PATCH] 0/4] POWER9 TCG enablements - BCD functions part I Jose Ricardo Ziviani
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 1/4] target-ppc: Implement bcdcfn. instruction Jose Ricardo Ziviani
2016-10-27 1:05 ` David Gibson
2016-10-27 15:29 ` joserz
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 2/4] target-ppc: Implement bcdctn. instruction Jose Ricardo Ziviani
2016-10-27 1:20 ` David Gibson
2016-10-27 16:13 ` joserz
2016-10-31 0:16 ` David Gibson
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 3/4] target-ppc: Implement bcdcfz. instruction Jose Ricardo Ziviani
2016-10-27 1:35 ` David Gibson
2016-10-27 18:02 ` joserz
2016-10-26 13:18 ` [Qemu-devel] [PATCH] 4/4] target-ppc: Implement bcdctz. instruction Jose Ricardo Ziviani
2016-10-27 1:47 ` David Gibson
2016-10-27 18:29 ` joserz [this message]
2016-10-27 20:08 ` [Qemu-devel] [Qemu-ppc] " joserz
2016-10-31 2:50 ` David Gibson
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