From: Stephen Boyd <sboyd@codeaurora.org>
To: Vladimir Zapolskiy <vz@mleia.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Sylvain Lemieux <slemieux.tyco@gmail.com>,
Sylvain Lemieux <slemieux@tycoint.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] clk: lpc32xx: add a quirk for PWM and MS clock dividers
Date: Tue, 1 Nov 2016 17:30:58 -0700 [thread overview]
Message-ID: <20161102003058.GH16026@codeaurora.org> (raw)
In-Reply-To: <1475803015-4067-1-git-send-email-vz@mleia.com>
On 10/07, Vladimir Zapolskiy wrote:
> In common clock framework CLK_DIVIDER_ONE_BASED or'ed with
> CLK_DIVIDER_ALLOW_ZERO flags indicates that
> 1) a divider clock may be set to zero value,
> 2) divider's zero value is interpreted as a non-divided clock.
>
> On the LPC32xx platform clock dividers of PWM and memory card clocks
> comply with the first condition, but zero value means a gated clock,
> thus it may happen that the divider value is not updated when
> the clock is enabled and the clock remains gated.
>
> The change adds one-shot quirks, which check for zero value of divider
> on initialization and set it to a non-zero value, therefore in runtime
> a gate clock will work as expected.
>
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] clk: lpc32xx: add a quirk for PWM and MS clock dividers
Date: Tue, 1 Nov 2016 17:30:58 -0700 [thread overview]
Message-ID: <20161102003058.GH16026@codeaurora.org> (raw)
In-Reply-To: <1475803015-4067-1-git-send-email-vz@mleia.com>
On 10/07, Vladimir Zapolskiy wrote:
> In common clock framework CLK_DIVIDER_ONE_BASED or'ed with
> CLK_DIVIDER_ALLOW_ZERO flags indicates that
> 1) a divider clock may be set to zero value,
> 2) divider's zero value is interpreted as a non-divided clock.
>
> On the LPC32xx platform clock dividers of PWM and memory card clocks
> comply with the first condition, but zero value means a gated clock,
> thus it may happen that the divider value is not updated when
> the clock is enabled and the clock remains gated.
>
> The change adds one-shot quirks, which check for zero value of divider
> on initialization and set it to a non-zero value, therefore in runtime
> a gate clock will work as expected.
>
> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-11-02 0:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-07 1:16 [PATCH] clk: lpc32xx: add a quirk for PWM and MS clock dividers Vladimir Zapolskiy
2016-10-07 1:16 ` Vladimir Zapolskiy
2016-10-11 16:01 ` Sylvain Lemieux
2016-10-11 16:01 ` Sylvain Lemieux
2016-11-02 0:30 ` Stephen Boyd [this message]
2016-11-02 0:30 ` Stephen Boyd
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