From: Stephen Boyd <sboyd@codeaurora.org>
To: Jiancheng Xue <xuejiancheng@hisilicon.com>
Cc: mturquette@baylibre.com, robh+dt@kernel.org,
mark.rutland@arm.com, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
bin.chen@linaro.org, elder@linaro.org,
hermit.wangheming@hisilicon.com, yanhaifeng@hisilicon.com,
wenpan@hisilicon.com, howell.yang@hisilicon.com
Subject: Re: [PATCH 1/2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Date: Fri, 11 Nov 2016 16:04:36 -0800 [thread overview]
Message-ID: <20161112000436.GF5177@codeaurora.org> (raw)
In-Reply-To: <1477721618-10809-2-git-send-email-xuejiancheng@hisilicon.com>
On 10/29, Jiancheng Xue wrote:
> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
> Generator) module generates clock and reset signals used
> by other module blocks on SoC.
>
> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
Applied to clk-hisi and merged into clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Jiancheng Xue <xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Cc: mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
bin.chen-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
elder-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
hermit.wangheming-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
wenpan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
howell.yang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
Subject: Re: [PATCH 1/2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Date: Fri, 11 Nov 2016 16:04:36 -0800 [thread overview]
Message-ID: <20161112000436.GF5177@codeaurora.org> (raw)
In-Reply-To: <1477721618-10809-2-git-send-email-xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
On 10/29, Jiancheng Xue wrote:
> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
> Generator) module generates clock and reset signals used
> by other module blocks on SoC.
>
> Signed-off-by: Jiancheng Xue <xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
Applied to clk-hisi and merged into clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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next prev parent reply other threads:[~2016-11-12 0:04 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-29 6:13 [PATCH 0/2] clk: hisilicon: add CRG driver for Hi3798CV200 and Hi3516CV300 SoCs Jiancheng Xue
2016-10-29 6:13 ` Jiancheng Xue
2016-10-29 6:13 ` [PATCH 1/2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC Jiancheng Xue
2016-10-29 6:13 ` Jiancheng Xue
2016-11-12 0:04 ` Stephen Boyd [this message]
2016-11-12 0:04 ` Stephen Boyd
2016-10-29 6:13 ` [PATCH 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Jiancheng Xue
2016-10-29 6:13 ` Jiancheng Xue
2016-10-29 11:36 ` Hao Zhang
2016-10-29 11:36 ` Hao Zhang
2016-10-31 2:05 ` Jiancheng Xue
2016-10-31 2:05 ` Jiancheng Xue
2016-11-12 0:04 ` Stephen Boyd
2016-11-12 0:04 ` Stephen Boyd
2016-11-14 1:24 ` Jiancheng Xue
2016-11-14 1:24 ` Jiancheng Xue
2016-11-14 20:03 ` Stephen Boyd
2016-11-15 1:58 ` Jiancheng Xue
2016-11-15 1:58 ` Jiancheng Xue
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