[PATCH 0/3] Media devices support for Exynos5433 TM2 board

[PATCH 0/3] Media devices support for Exynos5433 TM2 board

[Marek Szyprowski]

Hi!

This patchset adds support for various media devices found in Exynos 5433
SoC and enables them on TM2 board. Patches are prepared on top of my
previous patchset with fixes for Exynos 5433 TM2 board (see "Fixes for
Exynos5433 TM2 board" thread).

Best regards
Marek Szyprowski
Samsung R&D Institute Poland


Patch summary:

Marek Szyprowski (3):
  arm64: dts: exynos: TM2 - add support for GScaler devices
  arm64: dts: exynos: TM2 - add support for JPEG codec device
  arm64: dts: exynos: TM2 - add support for MFC video codec device

 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts |  23 +++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 140 ++++++++++++++++++++++++++
 2 files changed, 163 insertions(+)

-- 
1.9.1

[PATCH 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices

[Marek Szyprowski]

This patch adds device nodes for GScaler devices to Exynos 5433 SoC dtsi
and proper initial clock configuration to TM2 dts.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts |  7 +++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 81 +++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index 5ab1028..5ff5c30 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -909,6 +909,13 @@
 	assigned-clock-rates = <0>, <0>, <0>, <0>, <66700000>;
 };
 
+&cmu_gscl {
+	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
+			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
+	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
+				 <&cmu_top CLK_ACLK_GSCL_333>;
+};
+
 &spi_1 {
 	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
 	status = "okay";
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index ab29352..8ecde41 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -26,6 +26,12 @@
 
 	interrupt-parent = <&gic>;
 
+	aliases {
+		gsc0 = &gsc_0;
+		gsc1 = &gsc_1;
+		gsc2 = &gsc_2;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -798,6 +804,51 @@
 			reg = <0x145f0000 0x1038>;
 		};
 
+		gsc_0: video-scaler@13C00000 {
+			compatible = "samsung,exynos5433-gsc";
+			reg = <0x13c00000 0x1000>;
+			interrupts = <GIC_SPI 297 0>;
+			clocks = <&cmu_gscl CLK_PCLK_GSCL0>,
+				 <&cmu_gscl CLK_ACLK_GSCL0>,
+				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+			clock-names = "pclk",
+				      "aclk",
+				      "aclk_xiu",
+				      "aclk_gsclbend";
+			iommus = <&sysmmu_gscl0>;
+		};
+
+		gsc_1: video-scaler@13C10000 {
+			compatible = "samsung,exynos5433-gsc";
+			reg = <0x13c10000 0x1000>;
+			interrupts = <GIC_SPI 298 0>;
+			clocks = <&cmu_gscl CLK_PCLK_GSCL1>,
+				 <&cmu_gscl CLK_ACLK_GSCL1>,
+				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+			clock-names = "pclk",
+				      "aclk",
+				      "aclk_xiu",
+				      "aclk_gsclbend";
+			iommus = <&sysmmu_gscl1>;
+		};
+
+		gsc_2: video-scaler@13C20000 {
+			compatible = "samsung,exynos5433-gsc";
+			reg = <0x13c20000 0x1000>;
+			interrupts = <GIC_SPI 299 0>;
+			clocks = <&cmu_gscl CLK_PCLK_GSCL2>,
+				 <&cmu_gscl CLK_ACLK_GSCL2>,
+				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+			clock-names = "pclk",
+				      "aclk",
+				      "aclk_xiu",
+				      "aclk_gsclbend";
+			iommus = <&sysmmu_gscl2>;
+		};
+
 		sysmmu_decon0x: sysmmu@0x13a00000 {
 			compatible = "samsung,exynos-sysmmu";
 			reg = <0x13a00000 0x1000>;
@@ -818,6 +869,36 @@
 			#iommu-cells = <0>;
 		};
 
+		sysmmu_gscl0: sysmmu@0x13C80000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x13C80000 0x1000>;
+			interrupts = <GIC_SPI 288 0>;
+			clock-names = "aclk", "pclk";
+			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>,
+				 <&cmu_gscl CLK_PCLK_SMMU_GSCL0>;
+			#iommu-cells = <0>;
+		};
+
+		sysmmu_gscl1: sysmmu@0x13C90000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x13C90000 0x1000>;
+			interrupts = <GIC_SPI 290 0>;
+			clock-names = "aclk", "pclk";
+			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>,
+				 <&cmu_gscl CLK_PCLK_SMMU_GSCL1>;
+			#iommu-cells = <0>;
+		};
+
+		sysmmu_gscl2: sysmmu@0x13CA0000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x13CA0000 0x1000>;
+			interrupts = <GIC_SPI 292 0>;
+			clock-names = "aclk", "pclk";
+			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>,
+				 <&cmu_gscl CLK_PCLK_SMMU_GSCL2>;
+			#iommu-cells = <0>;
+		};
+
 		serial_0: serial@14c10000 {
 			compatible = "samsung,exynos5433-uart";
 			reg = <0x14c10000 0x100>;
-- 
1.9.1

[PATCH 2/3] arm64: dts: exynos: TM2 - add support for JPEG codec device

[Marek Szyprowski]

This patch adds device nodes for JPEG codec device to Exynos
5433 SoC dtsi and proper initial clock configuration to TM2 dts.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 11 +++++++++++
 arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 25 +++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index 5ff5c30..2e76b30 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -916,6 +916,17 @@
 				 <&cmu_top CLK_ACLK_GSCL_333>;
 };
 
+&cmu_mscl {
+	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
+			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
+			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
+			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
+	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
+				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
+				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
+				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
+};
+
 &spi_1 {
 	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
 	status = "okay";
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8ecde41..68127ab 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -849,6 +849,21 @@
 			iommus = <&sysmmu_gscl2>;
 		};
 
+		jpeg: codec@15020000 {
+			compatible = "samsung,exynos5433-jpeg";
+			reg = <0x15020000 0x10000>;
+			interrupts = <GIC_SPI 411 0>;
+			clock-names = "pclk",
+				      "aclk",
+				      "aclk_xiu",
+				      "sclk";
+			clocks = <&cmu_mscl CLK_PCLK_JPEG>,
+				 <&cmu_mscl CLK_ACLK_JPEG>,
+				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>,
+				 <&cmu_mscl CLK_SCLK_JPEG>;
+			iommus = <&sysmmu_jpeg>;
+		};
+
 		sysmmu_decon0x: sysmmu@0x13a00000 {
 			compatible = "samsung,exynos-sysmmu";
 			reg = <0x13a00000 0x1000>;
@@ -899,6 +914,16 @@
 			#iommu-cells = <0>;
 		};
 
+		sysmmu_jpeg: sysmmu@0x15060000 {
+			compatible = "samsung,exynos-sysmmu";
+			reg = <0x15060000 0x1000>;
+			interrupts = <GIC_SPI 408 0>;
+			clock-names = "pclk", "aclk";
+			clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>,
+				 <&cmu_mscl CLK_ACLK_SMMU_JPEG>;
+			#iommu-cells = <0>;
+		};
+
 		serial_0: serial@14c10000 {
 			compatible = "samsung,exynos5433-uart";
 			reg = <0x14c10000 0x100>;
-- 
1.9.1

Re: [PATCH 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices

[Chanwoo Choi]

Hi Marek,


2016-11-16 22:11 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>:
> This patch adds device nodes for GScaler devices to Exynos 5433 SoC dtsi
> and proper initial clock configuration to TM2 dts.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts |  7 +++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 81 +++++++++++++++++++++++++++
>  2 files changed, 88 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 5ab1028..5ff5c30 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -909,6 +909,13 @@
>         assigned-clock-rates = <0>, <0>, <0>, <0>, <66700000>;
>  };
>
> +&cmu_gscl {
> +       assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
> +                         <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
> +       assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
> +                                <&cmu_top CLK_ACLK_GSCL_333>;
> +};
> +
>  &spi_1 {
>         cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
>         status = "okay";
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index ab29352..8ecde41 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -26,6 +26,12 @@
>
>         interrupt-parent = <&gic>;
>
> +       aliases {
> +               gsc0 = &gsc_0;
> +               gsc1 = &gsc_1;
> +               gsc2 = &gsc_2;
> +       };

The all alias of exynos5333 were defined in the exynos5433-tm2.dts.
I think that you better to move the gsc's alias to exynos5433-tm2.dts file.

[snip]

Best Regards,
Chanwoo Choi

Re: [PATCH 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices

[Krzysztof Kozlowski]

On Wed, Nov 16, 2016 at 02:11:27PM +0100, Marek Szyprowski wrote:
> This patch adds device nodes for GScaler devices to Exynos 5433 SoC dtsi
> and proper initial clock configuration to TM2 dts.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts |  7 +++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 81 +++++++++++++++++++++++++++
>  2 files changed, 88 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 5ab1028..5ff5c30 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -909,6 +909,13 @@
>  	assigned-clock-rates = <0>, <0>, <0>, <0>, <66700000>;
>  };
>  
> +&cmu_gscl {

When resubmitting, please put it in alphabetical order.

> +	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
> +			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
> +	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
> +				 <&cmu_top CLK_ACLK_GSCL_333>;
> +};
> +
>  &spi_1 {
>  	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
>  	status = "okay";
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index ab29352..8ecde41 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -26,6 +26,12 @@
>  
>  	interrupt-parent = <&gic>;
>  
> +	aliases {
> +		gsc0 = &gsc_0;
> +		gsc1 = &gsc_1;
> +		gsc2 = &gsc_2;
> +	};
> +
>  	cpus {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> @@ -798,6 +804,51 @@
>  			reg = <0x145f0000 0x1038>;
>  		};
>  
> +		gsc_0: video-scaler@13C00000 {
> +			compatible = "samsung,exynos5433-gsc";
> +			reg = <0x13c00000 0x1000>;
> +			interrupts = <GIC_SPI 297 0>;

IRQ_TYPE_LEVEL_HIGH (and test it)
Please see:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/commit/?h=for-v4.10/dt64-gic-flags-fixes&id=ef4aea97a70013cecb69adf6a9f0d25ab6f11590

I am not accepting '0' as flags anymore because this was pointed out as
totally wrong. I know that it always worked for us... Applying of
Exynos5433 was last exception. :)

Best regards,
Krzysztof

> +			clocks = <&cmu_gscl CLK_PCLK_GSCL0>,
> +				 <&cmu_gscl CLK_ACLK_GSCL0>,
> +				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
> +				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
> +			clock-names = "pclk",
> +				      "aclk",
> +				      "aclk_xiu",
> +				      "aclk_gsclbend";
> +			iommus = <&sysmmu_gscl0>;
> +		};
> +
> +		gsc_1: video-scaler@13C10000 {
> +			compatible = "samsung,exynos5433-gsc";
> +			reg = <0x13c10000 0x1000>;
> +			interrupts = <GIC_SPI 298 0>;
> +			clocks = <&cmu_gscl CLK_PCLK_GSCL1>,
> +				 <&cmu_gscl CLK_ACLK_GSCL1>,
> +				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
> +				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
> +			clock-names = "pclk",
> +				      "aclk",
> +				      "aclk_xiu",
> +				      "aclk_gsclbend";
> +			iommus = <&sysmmu_gscl1>;
> +		};
> +
> +		gsc_2: video-scaler@13C20000 {
> +			compatible = "samsung,exynos5433-gsc";
> +			reg = <0x13c20000 0x1000>;
> +			interrupts = <GIC_SPI 299 0>;
> +			clocks = <&cmu_gscl CLK_PCLK_GSCL2>,
> +				 <&cmu_gscl CLK_ACLK_GSCL2>,
> +				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
> +				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
> +			clock-names = "pclk",
> +				      "aclk",
> +				      "aclk_xiu",
> +				      "aclk_gsclbend";
> +			iommus = <&sysmmu_gscl2>;
> +		};
> +
>  		sysmmu_decon0x: sysmmu@0x13a00000 {
>  			compatible = "samsung,exynos-sysmmu";
>  			reg = <0x13a00000 0x1000>;
> @@ -818,6 +869,36 @@
>  			#iommu-cells = <0>;
>  		};
>  
> +		sysmmu_gscl0: sysmmu@0x13C80000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x13C80000 0x1000>;
> +			interrupts = <GIC_SPI 288 0>;
> +			clock-names = "aclk", "pclk";
> +			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>,
> +				 <&cmu_gscl CLK_PCLK_SMMU_GSCL0>;
> +			#iommu-cells = <0>;
> +		};
> +
> +		sysmmu_gscl1: sysmmu@0x13C90000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x13C90000 0x1000>;
> +			interrupts = <GIC_SPI 290 0>;
> +			clock-names = "aclk", "pclk";
> +			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>,
> +				 <&cmu_gscl CLK_PCLK_SMMU_GSCL1>;
> +			#iommu-cells = <0>;
> +		};
> +
> +		sysmmu_gscl2: sysmmu@0x13CA0000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x13CA0000 0x1000>;
> +			interrupts = <GIC_SPI 292 0>;
> +			clock-names = "aclk", "pclk";
> +			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>,
> +				 <&cmu_gscl CLK_PCLK_SMMU_GSCL2>;
> +			#iommu-cells = <0>;
> +		};
> +
>  		serial_0: serial@14c10000 {
>  			compatible = "samsung,exynos5433-uart";
>  			reg = <0x14c10000 0x100>;
> -- 
> 1.9.1
> 

Re: [PATCH 2/3] arm64: dts: exynos: TM2 - add support for JPEG codec device

[Krzysztof Kozlowski]

On Wed, Nov 16, 2016 at 02:11:28PM +0100, Marek Szyprowski wrote:
> This patch adds device nodes for JPEG codec device to Exynos
> 5433 SoC dtsi and proper initial clock configuration to TM2 dts.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 11 +++++++++++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 25 +++++++++++++++++++++++++
>  2 files changed, 36 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 5ff5c30..2e76b30 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -916,6 +916,17 @@
>  				 <&cmu_top CLK_ACLK_GSCL_333>;
>  };
>  
> +&cmu_mscl {

If resubmitting, please put it in alphabetical order.

> +	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
> +			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> +			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
> +			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
> +	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
> +				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
> +				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
> +				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
> +};
> +
>  &spi_1 {
>  	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
>  	status = "okay";
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 8ecde41..68127ab 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -849,6 +849,21 @@
>  			iommus = <&sysmmu_gscl2>;
>  		};
>  
> +		jpeg: codec@15020000 {
> +			compatible = "samsung,exynos5433-jpeg";
> +			reg = <0x15020000 0x10000>;
> +			interrupts = <GIC_SPI 411 0>;

IRQ_TYPE_LEVEL_HIGH (or any different valid type)

> +			clock-names = "pclk",
> +				      "aclk",
> +				      "aclk_xiu",
> +				      "sclk";

These could be put in one line.

Best regards,
Krzysztof

> +			clocks = <&cmu_mscl CLK_PCLK_JPEG>,
> +				 <&cmu_mscl CLK_ACLK_JPEG>,
> +				 <&cmu_mscl CLK_ACLK_XIU_MSCLX>,
> +				 <&cmu_mscl CLK_SCLK_JPEG>;
> +			iommus = <&sysmmu_jpeg>;
> +		};
> +
>  		sysmmu_decon0x: sysmmu@0x13a00000 {
>  			compatible = "samsung,exynos-sysmmu";
>  			reg = <0x13a00000 0x1000>;
> @@ -899,6 +914,16 @@
>  			#iommu-cells = <0>;
>  		};
>  
> +		sysmmu_jpeg: sysmmu@0x15060000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x15060000 0x1000>;
> +			interrupts = <GIC_SPI 408 0>;
> +			clock-names = "pclk", "aclk";
> +			clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>,
> +				 <&cmu_mscl CLK_ACLK_SMMU_JPEG>;
> +			#iommu-cells = <0>;
> +		};
> +
>  		serial_0: serial@14c10000 {
>  			compatible = "samsung,exynos5433-uart";
>  			reg = <0x14c10000 0x100>;
> -- 
> 1.9.1
> 

Re: [PATCH 3/3] arm64: dts: exynos: TM2 - add support for MFC video codec device

[Krzysztof Kozlowski]

On Wed, Nov 16, 2016 at 02:11:29PM +0100, Marek Szyprowski wrote:
> This patch adds device nodes for MFC video codec device to Exynos 5433

BTW, you are mixing in various commit messages and titles the Exynos5433
with "Exynos 5433" (with space). Can we stick to one? :)

> SoC dtsi and proper initial clock configuration to TM2 dts.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts |  5 ++++
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi    | 34 +++++++++++++++++++++++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index 2e76b30..93efbeb 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -927,6 +927,11 @@
>  				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
>  };
>  
> +&cmu_mfc {

Alphabetical order.

> +	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
> +	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
> +};
> +
>  &spi_1 {
>  	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
>  	status = "okay";
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 68127ab..31bffe1 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -864,6 +864,20 @@
>  			iommus = <&sysmmu_jpeg>;
>  		};
>  
> +		mfc: codec@152E0000 {
> +			compatible = "samsung,exynos5433-mfc";
> +			reg = <0x152E0000 0x10000>;
> +			interrupts = <GIC_SPI 358 0>;

IRQ type.

> +			clocks = <&cmu_mfc CLK_PCLK_MFC>,
> +				 <&cmu_mfc CLK_ACLK_MFC>,
> +				 <&cmu_mfc CLK_ACLK_XIU_MFCX>;
> +			clock-names = "pclk",
> +				      "aclk",
> +				      "aclk_xiu";

Let's keep it consistent with other, so first clock-names, then clocks.
And clock-names can be squashed (like in other places).

Best regards,
Krzysztof


> +			iommus = <&sysmmu_mfc_0>, <&sysmmu_mfc_1>;
> +			iommu-names = "left", "right";
> +		};
> +
>  		sysmmu_decon0x: sysmmu@0x13a00000 {
>  			compatible = "samsung,exynos-sysmmu";
>  			reg = <0x13a00000 0x1000>;
> @@ -924,6 +938,26 @@
>  			#iommu-cells = <0>;
>  		};
>  
> +		sysmmu_mfc_0: sysmmu@0x15200000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x15200000 0x1000>;
> +			interrupts = <0 352 0>;
> +			clock-names = "pclk", "aclk";
> +			clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>,
> +				 <&cmu_mfc CLK_ACLK_SMMU_MFC_0>;
> +			#iommu-cells = <0>;
> +		};
> +
> +		sysmmu_mfc_1: sysmmu@0x15210000 {
> +			compatible = "samsung,exynos-sysmmu";
> +			reg = <0x15210000 0x1000>;
> +			interrupts = <0 354 0>;
> +			clock-names = "pclk", "aclk";
> +			clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>,
> +				 <&cmu_mfc CLK_ACLK_SMMU_MFC_1>;
> +			#iommu-cells = <0>;
> +		};
> +
>  		serial_0: serial@14c10000 {
>  			compatible = "samsung,exynos5433-uart";
>  			reg = <0x14c10000 0x100>;
> -- 
> 1.9.1
>