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From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Tomasz Nowicki <tn-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org>,
	"Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Sinan Kaya <okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	Jon Masters <jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	Dennis Chen <dennis.chen-5wv7dgnIgG8@public.gmane.org>,
	Prem Mallappa
	<prem.mallappa-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Subject: Re: [PATCH v8 10/16] drivers: iommu: arm-smmu-v3: split probe functions into DT/generic portions
Date: Fri, 18 Nov 2016 15:44:13 +0000	[thread overview]
Message-ID: <20161118154413.GU13470@arm.com> (raw)
In-Reply-To: <20161116152936.22955-11-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>

On Wed, Nov 16, 2016 at 03:29:30PM +0000, Lorenzo Pieralisi wrote:
> Current ARM SMMUv3 probe functions intermingle HW and DT probing in the
> initialization functions to detect and programme the ARM SMMU v3 driver
> features. In order to allow probing the ARM SMMUv3 with other firmwares
> than DT, this patch splits the ARM SMMUv3 init functions into DT and HW
> specific portions so that other FW interfaces (ie ACPI) can reuse the HW
> probing functions and skip the DT portion accordingly.
> 
> This patch implements no functional change, only code reshuffling.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
> Reviewed-by: Tomasz Nowicki <tn-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org>
> Tested-by: Hanjun Guo <hanjun.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Tested-by: Tomasz Nowicki <tn-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org>
> Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
> Cc: Hanjun Guo <hanjun.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
> Cc: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
> ---
>  drivers/iommu/arm-smmu-v3.c | 46 +++++++++++++++++++++++++++++----------------
>  1 file changed, 30 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index e6e1c87..ed563307 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2381,10 +2381,10 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
> +static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
>  {
>  	u32 reg;
> -	bool coherent;
> +	bool coherent = smmu->features & ARM_SMMU_FEAT_COHERENCY;
>  
>  	/* IDR0 */
>  	reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
> @@ -2436,13 +2436,9 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  		smmu->features |= ARM_SMMU_FEAT_HYP;
>  
>  	/*
> -	 * The dma-coherent property is used in preference to the ID
> +	 * The coherency feature as set by FW is used in preference to the ID
>  	 * register, but warn on mismatch.
>  	 */
> -	coherent = of_dma_is_coherent(smmu->dev->of_node);
> -	if (coherent)
> -		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> -
>  	if (!!(reg & IDR0_COHACC) != coherent)
>  		dev_warn(smmu->dev, "IDR0.COHACC overridden by dma-coherent property (%s)\n",
>  			 coherent ? "true" : "false");
> @@ -2563,21 +2559,37 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_dt_probe(struct platform_device *pdev)
> +static int arm_smmu_device_dt_probe(struct platform_device *pdev,
> +				    struct arm_smmu_device *smmu,
> +				    bool *bypass)
>  {
> -	int irq, ret;
> -	struct resource *res;
> -	struct arm_smmu_device *smmu;
>  	struct device *dev = &pdev->dev;
> -	bool bypass = true;
>  	u32 cells;
>  
> +	*bypass = true;
> +
>  	if (of_property_read_u32(dev->of_node, "#iommu-cells", &cells))
>  		dev_err(dev, "missing #iommu-cells property\n");
>  	else if (cells != 1)
>  		dev_err(dev, "invalid #iommu-cells value (%d)\n", cells);
>  	else
> -		bypass = false;
> +		*bypass = false;
> +
> +	parse_driver_options(smmu);
> +
> +	if (of_dma_is_coherent(dev->of_node))
> +		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> +
> +	return 0;

I know you're only moving code here, but the *bypass output parameter
now seems to be redundant with the unconditional return 0. Given that
we only set bypass to true if something went wrong, why don't we return
-ENODEV in those cases, kill the bypass parameter and rework the return
value check in the caller so that, rather than fail the probe, we pass
bypass=true to the reset function?

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: iommu@lists.linux-foundation.org,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Tomasz Nowicki <tn@semihalf.com>, Jon Masters <jcm@redhat.com>,
	Eric Auger <eric.auger@redhat.com>,
	Sinan Kaya <okaya@codeaurora.org>,
	Nate Watterson <nwatters@codeaurora.org>,
	Prem Mallappa <prem.mallappa@broadcom.com>,
	Dennis Chen <dennis.chen@arm.com>,
	linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v8 10/16] drivers: iommu: arm-smmu-v3: split probe functions into DT/generic portions
Date: Fri, 18 Nov 2016 15:44:13 +0000	[thread overview]
Message-ID: <20161118154413.GU13470@arm.com> (raw)
In-Reply-To: <20161116152936.22955-11-lorenzo.pieralisi@arm.com>

On Wed, Nov 16, 2016 at 03:29:30PM +0000, Lorenzo Pieralisi wrote:
> Current ARM SMMUv3 probe functions intermingle HW and DT probing in the
> initialization functions to detect and programme the ARM SMMU v3 driver
> features. In order to allow probing the ARM SMMUv3 with other firmwares
> than DT, this patch splits the ARM SMMUv3 init functions into DT and HW
> specific portions so that other FW interfaces (ie ACPI) can reuse the HW
> probing functions and skip the DT portion accordingly.
> 
> This patch implements no functional change, only code reshuffling.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Acked-by: Will Deacon <will.deacon@arm.com>
> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
> Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Tomasz Nowicki <tn@semihalf.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Hanjun Guo <hanjun.guo@linaro.org>
> Cc: Robin Murphy <robin.murphy@arm.com>
> Cc: Joerg Roedel <joro@8bytes.org>
> ---
>  drivers/iommu/arm-smmu-v3.c | 46 +++++++++++++++++++++++++++++----------------
>  1 file changed, 30 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index e6e1c87..ed563307 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2381,10 +2381,10 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
> +static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
>  {
>  	u32 reg;
> -	bool coherent;
> +	bool coherent = smmu->features & ARM_SMMU_FEAT_COHERENCY;
>  
>  	/* IDR0 */
>  	reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
> @@ -2436,13 +2436,9 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  		smmu->features |= ARM_SMMU_FEAT_HYP;
>  
>  	/*
> -	 * The dma-coherent property is used in preference to the ID
> +	 * The coherency feature as set by FW is used in preference to the ID
>  	 * register, but warn on mismatch.
>  	 */
> -	coherent = of_dma_is_coherent(smmu->dev->of_node);
> -	if (coherent)
> -		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> -
>  	if (!!(reg & IDR0_COHACC) != coherent)
>  		dev_warn(smmu->dev, "IDR0.COHACC overridden by dma-coherent property (%s)\n",
>  			 coherent ? "true" : "false");
> @@ -2563,21 +2559,37 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_dt_probe(struct platform_device *pdev)
> +static int arm_smmu_device_dt_probe(struct platform_device *pdev,
> +				    struct arm_smmu_device *smmu,
> +				    bool *bypass)
>  {
> -	int irq, ret;
> -	struct resource *res;
> -	struct arm_smmu_device *smmu;
>  	struct device *dev = &pdev->dev;
> -	bool bypass = true;
>  	u32 cells;
>  
> +	*bypass = true;
> +
>  	if (of_property_read_u32(dev->of_node, "#iommu-cells", &cells))
>  		dev_err(dev, "missing #iommu-cells property\n");
>  	else if (cells != 1)
>  		dev_err(dev, "invalid #iommu-cells value (%d)\n", cells);
>  	else
> -		bypass = false;
> +		*bypass = false;
> +
> +	parse_driver_options(smmu);
> +
> +	if (of_dma_is_coherent(dev->of_node))
> +		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> +
> +	return 0;

I know you're only moving code here, but the *bypass output parameter
now seems to be redundant with the unconditional return 0. Given that
we only set bypass to true if something went wrong, why don't we return
-ENODEV in those cases, kill the bypass parameter and rework the return
value check in the caller so that, rather than fail the probe, we pass
bypass=true to the reset function?

Will

WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 10/16] drivers: iommu: arm-smmu-v3: split probe functions into DT/generic portions
Date: Fri, 18 Nov 2016 15:44:13 +0000	[thread overview]
Message-ID: <20161118154413.GU13470@arm.com> (raw)
In-Reply-To: <20161116152936.22955-11-lorenzo.pieralisi@arm.com>

On Wed, Nov 16, 2016 at 03:29:30PM +0000, Lorenzo Pieralisi wrote:
> Current ARM SMMUv3 probe functions intermingle HW and DT probing in the
> initialization functions to detect and programme the ARM SMMU v3 driver
> features. In order to allow probing the ARM SMMUv3 with other firmwares
> than DT, this patch splits the ARM SMMUv3 init functions into DT and HW
> specific portions so that other FW interfaces (ie ACPI) can reuse the HW
> probing functions and skip the DT portion accordingly.
> 
> This patch implements no functional change, only code reshuffling.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Acked-by: Will Deacon <will.deacon@arm.com>
> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
> Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Tomasz Nowicki <tn@semihalf.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Hanjun Guo <hanjun.guo@linaro.org>
> Cc: Robin Murphy <robin.murphy@arm.com>
> Cc: Joerg Roedel <joro@8bytes.org>
> ---
>  drivers/iommu/arm-smmu-v3.c | 46 +++++++++++++++++++++++++++++----------------
>  1 file changed, 30 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index e6e1c87..ed563307 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -2381,10 +2381,10 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
> +static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
>  {
>  	u32 reg;
> -	bool coherent;
> +	bool coherent = smmu->features & ARM_SMMU_FEAT_COHERENCY;
>  
>  	/* IDR0 */
>  	reg = readl_relaxed(smmu->base + ARM_SMMU_IDR0);
> @@ -2436,13 +2436,9 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  		smmu->features |= ARM_SMMU_FEAT_HYP;
>  
>  	/*
> -	 * The dma-coherent property is used in preference to the ID
> +	 * The coherency feature as set by FW is used in preference to the ID
>  	 * register, but warn on mismatch.
>  	 */
> -	coherent = of_dma_is_coherent(smmu->dev->of_node);
> -	if (coherent)
> -		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> -
>  	if (!!(reg & IDR0_COHACC) != coherent)
>  		dev_warn(smmu->dev, "IDR0.COHACC overridden by dma-coherent property (%s)\n",
>  			 coherent ? "true" : "false");
> @@ -2563,21 +2559,37 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu)
>  	return 0;
>  }
>  
> -static int arm_smmu_device_dt_probe(struct platform_device *pdev)
> +static int arm_smmu_device_dt_probe(struct platform_device *pdev,
> +				    struct arm_smmu_device *smmu,
> +				    bool *bypass)
>  {
> -	int irq, ret;
> -	struct resource *res;
> -	struct arm_smmu_device *smmu;
>  	struct device *dev = &pdev->dev;
> -	bool bypass = true;
>  	u32 cells;
>  
> +	*bypass = true;
> +
>  	if (of_property_read_u32(dev->of_node, "#iommu-cells", &cells))
>  		dev_err(dev, "missing #iommu-cells property\n");
>  	else if (cells != 1)
>  		dev_err(dev, "invalid #iommu-cells value (%d)\n", cells);
>  	else
> -		bypass = false;
> +		*bypass = false;
> +
> +	parse_driver_options(smmu);
> +
> +	if (of_dma_is_coherent(dev->of_node))
> +		smmu->features |= ARM_SMMU_FEAT_COHERENCY;
> +
> +	return 0;

I know you're only moving code here, but the *bypass output parameter
now seems to be redundant with the unconditional return 0. Given that
we only set bypass to true if something went wrong, why don't we return
-ENODEV in those cases, kill the bypass parameter and rework the return
value check in the caller so that, rather than fail the probe, we pass
bypass=true to the reset function?

Will

  parent reply	other threads:[~2016-11-18 15:44 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 15:29 [PATCH v8 00/16] ACPI IORT ARM SMMU support Lorenzo Pieralisi
2016-11-16 15:29 ` Lorenzo Pieralisi
     [not found] ` <20161116152936.22955-1-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-16 15:29   ` [PATCH v8 01/16] drivers: acpi: add FWNODE_ACPI_STATIC fwnode type Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 02/16] drivers: acpi: iort: introduce linker section for IORT entries probing Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 03/16] drivers: acpi: iort: add support for IOMMU fwnode registration Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 04/16] drivers: iommu: make of_iommu_set/get_ops() DT agnostic Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
     [not found]     ` <20161116152936.22955-5-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-18 14:49       ` Will Deacon
2016-11-18 14:49         ` Will Deacon
2016-11-18 14:49         ` Will Deacon
2016-11-16 15:29   ` [PATCH v8 05/16] drivers: iommu: arm-smmu: convert struct device of_node to fwnode usage Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
     [not found]     ` <20161116152936.22955-6-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-18 14:49       ` Will Deacon
2016-11-18 14:49         ` Will Deacon
2016-11-18 14:49         ` Will Deacon
2016-11-16 15:29   ` [PATCH v8 06/16] drivers: iommu: arm-smmu-v3: " Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
     [not found]     ` <20161116152936.22955-7-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-18 14:50       ` Will Deacon
2016-11-18 14:50         ` Will Deacon
2016-11-18 14:50         ` Will Deacon
2016-11-16 15:29   ` [PATCH v8 07/16] drivers: acpi: implement acpi_dma_configure Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 08/16] drivers: acpi: iort: add node match function Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 09/16] drivers: acpi: iort: add support for ARM SMMU platform devices creation Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 10/16] drivers: iommu: arm-smmu-v3: split probe functions into DT/generic portions Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
     [not found]     ` <20161116152936.22955-11-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-18 15:44       ` Will Deacon [this message]
2016-11-18 15:44         ` Will Deacon
2016-11-18 15:44         ` Will Deacon
2016-11-16 15:29   ` [PATCH v8 11/16] drivers: iommu: arm-smmu-v3: add IORT configuration Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
     [not found]     ` <20161116152936.22955-12-lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
2016-11-18 15:55       ` Will Deacon
2016-11-18 15:55         ` Will Deacon
2016-11-18 15:55         ` Will Deacon
2016-11-18 15:55         ` Will Deacon
2016-11-16 15:29   ` [PATCH v8 12/16] drivers: iommu: arm-smmu: split probe functions into DT/generic portions Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-18 16:00     ` Will Deacon
2016-11-18 16:00       ` Will Deacon
2016-11-18 16:00       ` Will Deacon
2016-11-18 16:43       ` Robin Murphy
2016-11-18 16:43         ` Robin Murphy
2016-11-16 15:29   ` [PATCH v8 13/16] drivers: iommu: arm-smmu: add IORT configuration Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-18 16:08     ` Will Deacon
2016-11-18 16:08       ` Will Deacon
2016-11-18 16:08       ` Will Deacon
2016-11-18 17:36     ` Robin Murphy
2016-11-18 17:36       ` Robin Murphy
2016-11-18 17:36       ` Robin Murphy
     [not found]       ` <83df7dba-8d04-96ae-f59b-b0d484085e12-5wv7dgnIgG8@public.gmane.org>
2016-11-18 18:03         ` Lorenzo Pieralisi
2016-11-18 18:03           ` Lorenzo Pieralisi
2016-11-18 18:03           ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 14/16] drivers: acpi: iort: replace rid map type with type mask Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 15/16] drivers: acpi: iort: add single mapping function Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29   ` [PATCH v8 16/16] drivers: acpi: iort: introduce iort_iommu_configure Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi
2016-11-16 15:29     ` Lorenzo Pieralisi

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    --in-reply-to=20161118154413.GU13470@arm.com \
    --to=will.deacon-5wv7dgnigg8@public.gmane.org \
    --cc=dennis.chen-5wv7dgnIgG8@public.gmane.org \
    --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
    --cc=jcm-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org \
    --cc=linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org \
    --cc=marc.zyngier-5wv7dgnIgG8@public.gmane.org \
    --cc=okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org \
    --cc=prem.mallappa-dY08KVG/lbpWk0Htik3J/w@public.gmane.org \
    --cc=rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org \
    --cc=tn-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

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