* [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
@ 2016-12-01 19:27 ` Boris Brezillon
0 siblings, 0 replies; 6+ messages in thread
From: Boris Brezillon @ 2016-12-01 19:27 UTC (permalink / raw)
To: Mike Turquette, Stephen Boyd, linux-clk
Cc: Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, Stephen Warren, Lee Jones, Eric Anholt,
linux-rpi-kernel, linux-arm-kernel, Boris Brezillon, stable
bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
to zero when disabling the clock.
Make sure we preserve this value by reading the previous a2w_reg value
first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
---
drivers/clk/bcm/clk-bcm2835.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 836d07550be3..2acaa77ad482 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -751,7 +751,9 @@ static void bcm2835_pll_divider_off(struct clk_hw *hw)
cprman_write(cprman, data->cm_reg,
(cprman_read(cprman, data->cm_reg) &
~data->load_mask) | data->hold_mask);
- cprman_write(cprman, data->a2w_reg, A2W_PLL_CHANNEL_DISABLE);
+ cprman_write(cprman, data->a2w_reg,
+ cprman_read(cprman, data->a2w_reg) |
+ A2W_PLL_CHANNEL_DISABLE);
spin_unlock(&cprman->regs_lock);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
@ 2016-12-01 19:27 ` Boris Brezillon
0 siblings, 0 replies; 6+ messages in thread
From: Boris Brezillon @ 2016-12-01 19:27 UTC (permalink / raw)
To: linux-arm-kernel
bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
to zero when disabling the clock.
Make sure we preserve this value by reading the previous a2w_reg value
first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
---
drivers/clk/bcm/clk-bcm2835.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 836d07550be3..2acaa77ad482 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -751,7 +751,9 @@ static void bcm2835_pll_divider_off(struct clk_hw *hw)
cprman_write(cprman, data->cm_reg,
(cprman_read(cprman, data->cm_reg) &
~data->load_mask) | data->hold_mask);
- cprman_write(cprman, data->a2w_reg, A2W_PLL_CHANNEL_DISABLE);
+ cprman_write(cprman, data->a2w_reg,
+ cprman_read(cprman, data->a2w_reg) |
+ A2W_PLL_CHANNEL_DISABLE);
spin_unlock(&cprman->regs_lock);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
2016-12-01 19:27 ` Boris Brezillon
@ 2016-12-01 20:46 ` Eric Anholt
-1 siblings, 0 replies; 6+ messages in thread
From: Eric Anholt @ 2016-12-01 20:46 UTC (permalink / raw)
To: Boris Brezillon, Mike Turquette, Stephen Boyd, linux-clk
Cc: Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, Stephen Warren, Lee Jones,
linux-rpi-kernel, linux-arm-kernel, Boris Brezillon, stable
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Boris Brezillon <boris.brezillon@free-electrons.com> writes:
> bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
> to zero when disabling the clock.
>
> Make sure we preserve this value by reading the previous a2w_reg value
> first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: <stable@vger.kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
@ 2016-12-01 20:46 ` Eric Anholt
0 siblings, 0 replies; 6+ messages in thread
From: Eric Anholt @ 2016-12-01 20:46 UTC (permalink / raw)
To: linux-arm-kernel
Boris Brezillon <boris.brezillon@free-electrons.com> writes:
> bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
> to zero when disabling the clock.
>
> Make sure we preserve this value by reading the previous a2w_reg value
> first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: <stable@vger.kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
2016-12-01 19:27 ` Boris Brezillon
@ 2016-12-08 22:55 ` Stephen Boyd
-1 siblings, 0 replies; 6+ messages in thread
From: Stephen Boyd @ 2016-12-08 22:55 UTC (permalink / raw)
To: Boris Brezillon
Cc: Mike Turquette, linux-clk, Florian Fainelli, Ray Jui,
Scott Branden, bcm-kernel-feedback-list, Stephen Warren,
Lee Jones, Eric Anholt, linux-rpi-kernel, linux-arm-kernel,
stable
On 12/01, Boris Brezillon wrote:
> bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
> to zero when disabling the clock.
>
> Make sure we preserve this value by reading the previous a2w_reg value
> first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: <stable@vger.kernel.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
@ 2016-12-08 22:55 ` Stephen Boyd
0 siblings, 0 replies; 6+ messages in thread
From: Stephen Boyd @ 2016-12-08 22:55 UTC (permalink / raw)
To: linux-arm-kernel
On 12/01, Boris Brezillon wrote:
> bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
> to zero when disabling the clock.
>
> Make sure we preserve this value by reading the previous a2w_reg value
> first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
>
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
> Cc: <stable@vger.kernel.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-12-08 22:55 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-12-01 19:27 [PATCH] clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk Boris Brezillon
2016-12-01 19:27 ` Boris Brezillon
2016-12-01 20:46 ` Eric Anholt
2016-12-01 20:46 ` Eric Anholt
2016-12-08 22:55 ` Stephen Boyd
2016-12-08 22:55 ` Stephen Boyd
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