From: Ingo Molnar <mingo@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>,
Bruce Schlobohm <bruce.schlobohm@intel.com>,
Roland Scheidegger <rscheidegger_lists@hispeed.ch>,
Kevin Stanton <kevin.b.stanton@intel.com>,
Allen Hung <allen_hung@dell.com>,
stable@vger.kernel.org
Subject: Re: [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero
Date: Fri, 16 Dec 2016 12:52:54 +0100 [thread overview]
Message-ID: <20161216115254.GA18902@gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.20.1612161121140.3470@nanos>
* Thomas Gleixner <tglx@linutronix.de> wrote:
> We have two options:
>
> 1) Disable TSC deadline timer by default and force users with sane machines
> to enable it on the kernel command line.
>
> Upside: Very small patch
>
> Downside: Degrades existing setups on sane machines, keeps TSC unusable
> on affected machines. We have no idea what other hidden side
> effects the TSC_ADJUST tinkering has. If there are any, they
> ain't be nice ones.
>
> 2) Push the whole TSC_ADJUST sanitizing machinery into stable
>
> Upside: Does not affect sane machines and gives a benefit to users of
> affected machines
>
> Downside: Rather large patch, but not that risky either. Needs a few
> eyes and good test coverage though
>
> Thoughts?
I'd go for #2, because #1 is essentially turning it off for almost everyone.
We can still do #1 and push it back to -stable as well if #2 fails.
But I'd suggest we delay the stable backporting until it's been upstream a bit.
Thanks,
Ingo
next prev parent reply other threads:[~2016-12-16 12:00 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-13 13:14 [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Thomas Gleixner
2016-12-13 13:14 ` [patch 2/2] x86/tsc: Force TSC_ADJUST register to value >= zero Thomas Gleixner
2016-12-13 13:43 ` Peter Zijlstra
2016-12-13 15:49 ` Thomas Gleixner
2016-12-15 10:53 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-16 11:46 ` [patch 2/2] " Thomas Gleixner
2016-12-16 11:52 ` Ingo Molnar [this message]
2016-12-16 11:53 ` Thomas Gleixner
2016-12-16 13:33 ` Thomas Gleixner
2016-12-13 13:14 ` [patch 1/2] x86/tsc: Validate TSC_ADJUST after resume Thomas Gleixner
2016-12-13 13:22 ` Peter Zijlstra
2016-12-13 13:23 ` Thomas Gleixner
2016-12-15 10:52 ` [tip:x86/timers] " tip-bot for Thomas Gleixner
2016-12-13 16:34 ` [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC deadline timer irq storm Roland Scheidegger
2016-12-13 16:46 ` Thomas Gleixner
2016-12-14 1:36 ` Roland Scheidegger
2016-12-14 7:31 ` Thomas Gleixner
2016-12-14 20:59 ` Thomas Gleixner
2016-12-14 21:40 ` Thomas Gleixner
2016-12-14 22:54 ` Roland Scheidegger
2016-12-15 9:31 ` Thomas Gleixner
2017-01-26 23:40 ` Stanton, Kevin B
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161216115254.GA18902@gmail.com \
--to=mingo@kernel.org \
--cc=allen_hung@dell.com \
--cc=bp@alien8.de \
--cc=bruce.schlobohm@intel.com \
--cc=kevin.b.stanton@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=peterz@infradead.org \
--cc=rscheidegger_lists@hispeed.ch \
--cc=stable@vger.kernel.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.