All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20161230015758.GF6177@dragon>

diff --git a/a/1.txt b/N1/1.txt
index 1fb04bb..104e34e 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -23,16 +23,16 @@ On Sun, Dec 18, 2016 at 11:17:56PM -0800, Andrey Smirnov wrote:
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 > +
-> +		mdio_mux_1: mdio at 1 {
+> +		mdio_mux_1: mdio@1 {
 > +			reg = <1>;
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +
-> +			switch0: switch0 at 0 {
+> +			switch0: switch0@0 {
 
 Drop the zero in node name.
 
-	switch0: switch at 0
+	switch0: switch@0
 
 > +				compatible = "marvell,mv88e6190";
 > +				#address-cells = <1>;
@@ -44,7 +44,7 @@ Drop the zero in node name.
 > +					#address-cells = <1>;
 > +					#size-cells = <0>;
 > +
-> +					port at 0 {
+> +					port@0 {
 > +						reg = <0>;
 > +						label = "cpu";
 > +						ethernet = <&fec1>;
@@ -59,27 +59,27 @@ Shawn
 > +						};
 > +					};
 > +
-> +					port at 1 {
+> +					port@1 {
 > +						reg = <1>;
 > +						label = "lan1";
 > +					};
 > +
-> +					port at 2 {
+> +					port@2 {
 > +						reg = <2>;
 > +						label = "lan2";
 > +					};
 > +
-> +					port at 3 {
+> +					port@3 {
 > +						reg = <3>;
 > +						label = "lan3";
 > +					};
 > +
-> +					port at 4 {
+> +					port@4 {
 > +						reg = <4>;
 > +						label = "lan4";
 > +					};
 > +
-> +					switch0port10: port at 10 {
+> +					switch0port10: port@10 {
 > +						reg = <10>;
 > +						label = "dsa";
 > +						phy-mode = "xgmii";
@@ -89,12 +89,12 @@ Shawn
 > +			};
 > +		};
 > +
-> +		mdio_mux_2: mdio at 2 {
+> +		mdio_mux_2: mdio@2 {
 > +			reg = <2>;
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +
-> +			switch1: switch1 at 0 {
+> +			switch1: switch1@0 {
 > +				compatible = "marvell,mv88e6190";
 > +				#address-cells = <1>;
 > +				#size-cells = <0>;
@@ -105,28 +105,28 @@ Shawn
 > +					#address-cells = <1>;
 > +					#size-cells = <0>;
 > +
-> +					port at 1 {
+> +					port@1 {
 > +						reg = <1>;
 > +						label = "lan5";
 > +					};
 > +
-> +					port at 2 {
+> +					port@2 {
 > +						reg = <2>;
 > +						label = "lan6";
 > +					};
 > +
-> +					port at 3 {
+> +					port@3 {
 > +						reg = <3>;
 > +						label = "lan7";
 > +					};
 > +
-> +					port at 4 {
+> +					port@4 {
 > +						reg = <4>;
 > +						label = "lan8";
 > +					};
 > +
 > +
-> +					switch1port10: port at 10 {
+> +					switch1port10: port@10 {
 > +						reg = <10>;
 > +						label = "dsa";
 > +						phy-mode = "xgmii";
@@ -136,7 +136,7 @@ Shawn
 > +			};
 > +		};
 > +
-> +		mdio_mux_4: mdio at 4 {
+> +		mdio_mux_4: mdio@4 {
 > +			reg = <4>;
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
@@ -151,7 +151,7 @@ Shawn
 > +	status = "okay";
 > +	spi-num-chipselects = <2>;
 > +
-> +	m25p128 at 0 {
+> +	m25p128@0 {
 > +		compatible = "m25p128", "jedec,spi-nor";
 > +		#address-cells = <1>;
 > +		#size-cells = <1>;
@@ -159,7 +159,7 @@ Shawn
 > +		spi-max-frequency = <1000000>;
 > +	};
 > +
-> +	atzb-rf-233 at 1 {
+> +	atzb-rf-233@1 {
 > +		compatible = "atmel,at86rf233";
 > +
 > +		pinctrl-names = "default";
@@ -187,7 +187,7 @@ Shawn
 > +	 *    P1 - WE2_CMD
 > +	 *    P2 - WE2_CLK
 > +	 */
-> +	gpio5: pca9557 at 18 {
+> +	gpio5: pca9557@18 {
 > +		compatible = "nxp,pca9557";
 > +		reg = <0x18>;
 > +		gpio-controller;
@@ -214,7 +214,7 @@ Shawn
 > +	 *    I/O14 - OPT1_TX_DIS
 > +	 *    I/O15 - OPT2_TX_DIS
 > +	 */
-> +	gpio6: sx1503 at 20 {
+> +	gpio6: sx1503@20 {
 > +		compatible = "semtech,sx1503q";
 > +
 > +		pinctrl-names = "default";
@@ -242,7 +242,7 @@ Shawn
 > +	 *     IO0 - WE1_CLK
 > +	 *     IO1 - WE1_CMD
 > +	 */
-> +	gpio7: pca9554 at 22 {
+> +	gpio7: pca9554@22 {
 > +		compatible = "nxp,pca9554";
 > +		reg = <0x22>;
 > +		gpio-controller;
@@ -252,7 +252,7 @@ Shawn
 > +};
 > +
 > +&i2c1 {
-> +	at24mac602 at 00 {
+> +	at24mac602@00 {
 > +		compatible = "atmel,24c02";
 > +		reg = <0x50>;
 > +		read-only;
@@ -260,7 +260,7 @@ Shawn
 > +};
 > +
 > +&i2c2 {
-> +	tca9548 at 70 {
+> +	tca9548@70 {
 > +		compatible = "nxp,pca9548";
 > +		pinctrl-0 = <&pinctrl_i2c_mux_reset>;
 > +		pinctrl-names = "default";
@@ -269,35 +269,35 @@ Shawn
 > +		reg = <0x70>;
 > +		reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 > +
-> +		i2c at 0 {
+> +		i2c@0 {
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +			reg = <0>;
 > +		};
 > +
-> +		i2c at 1 {
+> +		i2c@1 {
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +			reg = <1>;
 > +
-> +			sfp2: at24c04 at 50 {
+> +			sfp2: at24c04@50 {
 > +				compatible = "atmel,24c02";
 > +				reg = <0x50>;
 > +			};
 > +		};
 > +
-> +		i2c at 2 {
+> +		i2c@2 {
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +			reg = <2>;
 > +
-> +			sfp3: at24c04 at 50 {
+> +			sfp3: at24c04@50 {
 > +				compatible = "atmel,24c02";
 > +				reg = <0x50>;
 > +			};
 > +		};
 > +
-> +		i2c at 3 {
+> +		i2c@3 {
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
 > +			reg = <3>;
@@ -335,7 +335,7 @@ Shawn
 > +		#size-cells = <0>;
 > +		status = "okay";
 > +
-> +		ethernet-phy at 0 {
+> +		ethernet-phy@0 {
 > +			compatible = "ethernet-phy-ieee802.3-c22";
 > +
 > +			pinctrl-names = "default";
@@ -529,22 +529,22 @@ Shawn
 > +	sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 > +	status = "okay";
 > +
-> +	lm75 at 48 {
+> +	lm75@48 {
 > +		compatible = "national,lm75";
 > +		reg = <0x48>;
 > +	};
 > +
-> +	at24c04 at 50 {
+> +	at24c04@50 {
 > +		compatible = "atmel,24c04";
 > +		reg = <0x50>;
 > +	};
 > +
-> +	at24c04 at 52 {
+> +	at24c04@52 {
 > +		compatible = "atmel,24c04";
 > +		reg = <0x52>;
 > +	};
 > +
-> +	ds1682 at 6b {
+> +	ds1682@6b {
 > +		compatible = "dallas,ds1682";
 > +		reg = <0x6b>;
 > +	};
diff --git a/a/content_digest b/N1/content_digest
index f1a7745..2809f57 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,20 @@
  "ref\01482131877-6097-1-git-send-email-andrew.smirnov@gmail.com\0"
  "ref\01482131877-6097-2-git-send-email-andrew.smirnov@gmail.com\0"
- "From\0shawnguo@kernel.org (Shawn Guo)\0"
- "Subject\0[PATCH v4 2/3] ARM: dts: vf610-zii-dev: Add .dts file for rev. C\0"
+ "From\0Shawn Guo <shawnguo@kernel.org>\0"
+ "Subject\0Re: [PATCH v4 2/3] ARM: dts: vf610-zii-dev: Add .dts file for rev. C\0"
  "Date\0Fri, 30 Dec 2016 09:58:02 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Andrey Smirnov <andrew.smirnov@gmail.com>\0"
+ "Cc\0linux-arm-kernel@lists.infradead.org"
+  Rob Herring <robh+dt@kernel.org>
+  Mark Rutland <mark.rutland@arm.com>
+  Russell King <linux@armlinux.org.uk>
+  Sascha Hauer <kernel@pengutronix.de>
+  Stefan Agner <stefan@agner.ch>
+  devicetree@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  andrew@lunn.ch
+  Vivien Didelot <vivien.didelot@savoirfairelinux.com>
+ " cphealy@gmail.com\0"
  "\00:1\0"
  "b\0"
  "On Sun, Dec 18, 2016 at 11:17:56PM -0800, Andrey Smirnov wrote:\n"
@@ -31,16 +42,16 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tmdio_mux_1: mdio at 1 {\n"
+ "> +\t\tmdio_mux_1: mdio@1 {\n"
  "> +\t\t\treg = <1>;\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\tswitch0: switch0 at 0 {\n"
+ "> +\t\t\tswitch0: switch0@0 {\n"
  "\n"
  "Drop the zero in node name.\n"
  "\n"
- "\tswitch0: switch at 0\n"
+ "\tswitch0: switch@0\n"
  "\n"
  "> +\t\t\t\tcompatible = \"marvell,mv88e6190\";\n"
  "> +\t\t\t\t#address-cells = <1>;\n"
@@ -52,7 +63,7 @@
  "> +\t\t\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\t\t\tport at 0 {\n"
+ "> +\t\t\t\t\tport@0 {\n"
  "> +\t\t\t\t\t\treg = <0>;\n"
  "> +\t\t\t\t\t\tlabel = \"cpu\";\n"
  "> +\t\t\t\t\t\tethernet = <&fec1>;\n"
@@ -67,27 +78,27 @@
  "> +\t\t\t\t\t\t};\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 1 {\n"
+ "> +\t\t\t\t\tport@1 {\n"
  "> +\t\t\t\t\t\treg = <1>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan1\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 2 {\n"
+ "> +\t\t\t\t\tport@2 {\n"
  "> +\t\t\t\t\t\treg = <2>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan2\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 3 {\n"
+ "> +\t\t\t\t\tport@3 {\n"
  "> +\t\t\t\t\t\treg = <3>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan3\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 4 {\n"
+ "> +\t\t\t\t\tport@4 {\n"
  "> +\t\t\t\t\t\treg = <4>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan4\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tswitch0port10: port at 10 {\n"
+ "> +\t\t\t\t\tswitch0port10: port@10 {\n"
  "> +\t\t\t\t\t\treg = <10>;\n"
  "> +\t\t\t\t\t\tlabel = \"dsa\";\n"
  "> +\t\t\t\t\t\tphy-mode = \"xgmii\";\n"
@@ -97,12 +108,12 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmdio_mux_2: mdio at 2 {\n"
+ "> +\t\tmdio_mux_2: mdio@2 {\n"
  "> +\t\t\treg = <2>;\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\tswitch1: switch1 at 0 {\n"
+ "> +\t\t\tswitch1: switch1@0 {\n"
  "> +\t\t\t\tcompatible = \"marvell,mv88e6190\";\n"
  "> +\t\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t\t#size-cells = <0>;\n"
@@ -113,28 +124,28 @@
  "> +\t\t\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\t\t\t\tport at 1 {\n"
+ "> +\t\t\t\t\tport@1 {\n"
  "> +\t\t\t\t\t\treg = <1>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan5\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 2 {\n"
+ "> +\t\t\t\t\tport@2 {\n"
  "> +\t\t\t\t\t\treg = <2>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan6\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 3 {\n"
+ "> +\t\t\t\t\tport@3 {\n"
  "> +\t\t\t\t\t\treg = <3>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan7\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\t\tport at 4 {\n"
+ "> +\t\t\t\t\tport@4 {\n"
  "> +\t\t\t\t\t\treg = <4>;\n"
  "> +\t\t\t\t\t\tlabel = \"lan8\";\n"
  "> +\t\t\t\t\t};\n"
  "> +\n"
  "> +\n"
- "> +\t\t\t\t\tswitch1port10: port at 10 {\n"
+ "> +\t\t\t\t\tswitch1port10: port@10 {\n"
  "> +\t\t\t\t\t\treg = <10>;\n"
  "> +\t\t\t\t\t\tlabel = \"dsa\";\n"
  "> +\t\t\t\t\t\tphy-mode = \"xgmii\";\n"
@@ -144,7 +155,7 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmdio_mux_4: mdio at 4 {\n"
+ "> +\t\tmdio_mux_4: mdio@4 {\n"
  "> +\t\t\treg = <4>;\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
@@ -159,7 +170,7 @@
  "> +\tstatus = \"okay\";\n"
  "> +\tspi-num-chipselects = <2>;\n"
  "> +\n"
- "> +\tm25p128 at 0 {\n"
+ "> +\tm25p128@0 {\n"
  "> +\t\tcompatible = \"m25p128\", \"jedec,spi-nor\";\n"
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <1>;\n"
@@ -167,7 +178,7 @@
  "> +\t\tspi-max-frequency = <1000000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tatzb-rf-233 at 1 {\n"
+ "> +\tatzb-rf-233@1 {\n"
  "> +\t\tcompatible = \"atmel,at86rf233\";\n"
  "> +\n"
  "> +\t\tpinctrl-names = \"default\";\n"
@@ -195,7 +206,7 @@
  "> +\t *    P1 - WE2_CMD\n"
  "> +\t *    P2 - WE2_CLK\n"
  "> +\t */\n"
- "> +\tgpio5: pca9557 at 18 {\n"
+ "> +\tgpio5: pca9557@18 {\n"
  "> +\t\tcompatible = \"nxp,pca9557\";\n"
  "> +\t\treg = <0x18>;\n"
  "> +\t\tgpio-controller;\n"
@@ -222,7 +233,7 @@
  "> +\t *    I/O14 - OPT1_TX_DIS\n"
  "> +\t *    I/O15 - OPT2_TX_DIS\n"
  "> +\t */\n"
- "> +\tgpio6: sx1503 at 20 {\n"
+ "> +\tgpio6: sx1503@20 {\n"
  "> +\t\tcompatible = \"semtech,sx1503q\";\n"
  "> +\n"
  "> +\t\tpinctrl-names = \"default\";\n"
@@ -250,7 +261,7 @@
  "> +\t *     IO0 - WE1_CLK\n"
  "> +\t *     IO1 - WE1_CMD\n"
  "> +\t */\n"
- "> +\tgpio7: pca9554 at 22 {\n"
+ "> +\tgpio7: pca9554@22 {\n"
  "> +\t\tcompatible = \"nxp,pca9554\";\n"
  "> +\t\treg = <0x22>;\n"
  "> +\t\tgpio-controller;\n"
@@ -260,7 +271,7 @@
  "> +};\n"
  "> +\n"
  "> +&i2c1 {\n"
- "> +\tat24mac602 at 00 {\n"
+ "> +\tat24mac602@00 {\n"
  "> +\t\tcompatible = \"atmel,24c02\";\n"
  "> +\t\treg = <0x50>;\n"
  "> +\t\tread-only;\n"
@@ -268,7 +279,7 @@
  "> +};\n"
  "> +\n"
  "> +&i2c2 {\n"
- "> +\ttca9548 at 70 {\n"
+ "> +\ttca9548@70 {\n"
  "> +\t\tcompatible = \"nxp,pca9548\";\n"
  "> +\t\tpinctrl-0 = <&pinctrl_i2c_mux_reset>;\n"
  "> +\t\tpinctrl-names = \"default\";\n"
@@ -277,35 +288,35 @@
  "> +\t\treg = <0x70>;\n"
  "> +\t\treset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;\n"
  "> +\n"
- "> +\t\ti2c at 0 {\n"
+ "> +\t\ti2c@0 {\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\t\t\treg = <0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 1 {\n"
+ "> +\t\ti2c@1 {\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\t\t\treg = <1>;\n"
  "> +\n"
- "> +\t\t\tsfp2: at24c04 at 50 {\n"
+ "> +\t\t\tsfp2: at24c04@50 {\n"
  "> +\t\t\t\tcompatible = \"atmel,24c02\";\n"
  "> +\t\t\t\treg = <0x50>;\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 2 {\n"
+ "> +\t\ti2c@2 {\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\t\t\treg = <2>;\n"
  "> +\n"
- "> +\t\t\tsfp3: at24c04 at 50 {\n"
+ "> +\t\t\tsfp3: at24c04@50 {\n"
  "> +\t\t\t\tcompatible = \"atmel,24c02\";\n"
  "> +\t\t\t\treg = <0x50>;\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 3 {\n"
+ "> +\t\ti2c@3 {\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
  "> +\t\t\treg = <3>;\n"
@@ -343,7 +354,7 @@
  "> +\t\t#size-cells = <0>;\n"
  "> +\t\tstatus = \"okay\";\n"
  "> +\n"
- "> +\t\tethernet-phy at 0 {\n"
+ "> +\t\tethernet-phy@0 {\n"
  "> +\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n"
  "> +\n"
  "> +\t\t\tpinctrl-names = \"default\";\n"
@@ -537,22 +548,22 @@
  "> +\tsda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;\n"
  "> +\tstatus = \"okay\";\n"
  "> +\n"
- "> +\tlm75 at 48 {\n"
+ "> +\tlm75@48 {\n"
  "> +\t\tcompatible = \"national,lm75\";\n"
  "> +\t\treg = <0x48>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tat24c04 at 50 {\n"
+ "> +\tat24c04@50 {\n"
  "> +\t\tcompatible = \"atmel,24c04\";\n"
  "> +\t\treg = <0x50>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tat24c04 at 52 {\n"
+ "> +\tat24c04@52 {\n"
  "> +\t\tcompatible = \"atmel,24c04\";\n"
  "> +\t\treg = <0x52>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tds1682 at 6b {\n"
+ "> +\tds1682@6b {\n"
  "> +\t\tcompatible = \"dallas,ds1682\";\n"
  "> +\t\treg = <0x6b>;\n"
  "> +\t};\n"
@@ -785,4 +796,4 @@
  "> 2.5.5\n"
  >
 
-c32a6e0f2eb5daf24a650b9d673e9d5ae6d42895640ed79f20d1c8b487c04024
+975b3ce6c3d87f2cdc619149b41574c6501604fb2e6a3c14afbb6f2adb68682e

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.