diff for duplicates of <20170105135837.GC25333@leverpostej> diff --git a/a/1.txt b/N1/1.txt index 8b26d1b..4e7234e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,14 +1,14 @@ On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote: > + internal-regs { -> + coreclk: mvebu-sar at 18230 { +> + coreclk: mvebu-sar@18230 { > + compatible = "marvell,mv98dx3236-core-clock"; > + }; > + -> + cpuclk: clock-complex at 18700 { +> + cpuclk: clock-complex@18700 { > + compatible = "marvell,mv98dx3236-cpu-clock"; > + }; > + -> + corediv-clock at 18740 { +> + corediv-clock@18740 { > + compatible = "marvell,mv98dx3236-corediv-clock"; > + reg = <0xf8268 0xc>; > + base = <&dfx>; @@ -27,7 +27,7 @@ On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote: > + #size-cells = <1>; > + ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; > + -> + dfx: dfx at 0 { +> + dfx: dfx@0 { > + compatible = "simple-bus"; > + reg = <0 0x100000>; > + }; @@ -43,3 +43,7 @@ reference to dfx. Thanks, Mark. +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 34a6c20..224b440 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,22 +1,32 @@ "ref\020170105033641.6212-1-chris.packham@alliedtelesis.co.nz\0" "ref\020170105033641.6212-5-chris.packham@alliedtelesis.co.nz\0" - "From\0mark.rutland@arm.com (Mark Rutland)\0" - "Subject\0[PATCHv2 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs\0" + "ref\020170105033641.6212-5-chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org\0" + "From\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0" + "Subject\0Re: [PATCHv2 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs\0" "Date\0Thu, 5 Jan 2017 13:58:37 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Chris Packham <chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org>\0" + "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org> + Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> + Gregory Clement <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> + Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\00:1\0" "b\0" "On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote:\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tcoreclk: mvebu-sar at 18230 {\n" + "> +\t\t\tcoreclk: mvebu-sar@18230 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-core-clock\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcpuclk: clock-complex at 18700 {\n" + "> +\t\t\tcpuclk: clock-complex@18700 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-cpu-clock\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcorediv-clock at 18740 {\n" + "> +\t\t\tcorediv-clock@18740 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-corediv-clock\";\n" "> +\t\t\t\treg = <0xf8268 0xc>;\n" "> +\t\t\t\tbase = <&dfx>;\n" @@ -35,7 +45,7 @@ "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;\n" "> +\n" - "> +\t\t\tdfx: dfx at 0 {\n" + "> +\t\t\tdfx: dfx@0 {\n" "> +\t\t\t\tcompatible = \"simple-bus\";\n" "> +\t\t\t\treg = <0 0x100000>;\n" "> +\t\t\t};\n" @@ -50,6 +60,10 @@ "reference to dfx.\n" "\n" "Thanks,\n" - Mark. + "Mark.\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -8a8897e4e2a893af582e6e5e381d7e7f132a28b9a0bcc0affeb9a05e670054c9 +31959a189e537dc3b51f0dff527ebde0cce29fa7a0b22ffa811c1896fb4c5fb4
diff --git a/a/1.txt b/N2/1.txt index 8b26d1b..2360cf6 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,14 +1,14 @@ On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote: > + internal-regs { -> + coreclk: mvebu-sar at 18230 { +> + coreclk: mvebu-sar@18230 { > + compatible = "marvell,mv98dx3236-core-clock"; > + }; > + -> + cpuclk: clock-complex at 18700 { +> + cpuclk: clock-complex@18700 { > + compatible = "marvell,mv98dx3236-cpu-clock"; > + }; > + -> + corediv-clock at 18740 { +> + corediv-clock@18740 { > + compatible = "marvell,mv98dx3236-corediv-clock"; > + reg = <0xf8268 0xc>; > + base = <&dfx>; @@ -27,7 +27,7 @@ On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote: > + #size-cells = <1>; > + ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; > + -> + dfx: dfx at 0 { +> + dfx: dfx@0 { > + compatible = "simple-bus"; > + reg = <0 0x100000>; > + }; diff --git a/a/content_digest b/N2/content_digest index 34a6c20..03ca5ca 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,22 +1,31 @@ "ref\020170105033641.6212-1-chris.packham@alliedtelesis.co.nz\0" "ref\020170105033641.6212-5-chris.packham@alliedtelesis.co.nz\0" - "From\0mark.rutland@arm.com (Mark Rutland)\0" - "Subject\0[PATCHv2 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs\0" + "From\0Mark Rutland <mark.rutland@arm.com>\0" + "Subject\0Re: [PATCHv2 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs\0" "Date\0Thu, 5 Jan 2017 13:58:37 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Chris Packham <chris.packham@alliedtelesis.co.nz>\0" + "Cc\0linux-arm-kernel@lists.infradead.org" + Rob Herring <robh+dt@kernel.org> + Jason Cooper <jason@lakedaemon.net> + Andrew Lunn <andrew@lunn.ch> + Gregory Clement <gregory.clement@free-electrons.com> + Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> + Russell King <linux@armlinux.org.uk> + devicetree@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On Thu, Jan 05, 2017 at 04:36:40PM +1300, Chris Packham wrote:\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tcoreclk: mvebu-sar at 18230 {\n" + "> +\t\t\tcoreclk: mvebu-sar@18230 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-core-clock\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcpuclk: clock-complex at 18700 {\n" + "> +\t\t\tcpuclk: clock-complex@18700 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-cpu-clock\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcorediv-clock at 18740 {\n" + "> +\t\t\tcorediv-clock@18740 {\n" "> +\t\t\t\tcompatible = \"marvell,mv98dx3236-corediv-clock\";\n" "> +\t\t\t\treg = <0xf8268 0xc>;\n" "> +\t\t\t\tbase = <&dfx>;\n" @@ -35,7 +44,7 @@ "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;\n" "> +\n" - "> +\t\t\tdfx: dfx at 0 {\n" + "> +\t\t\tdfx: dfx@0 {\n" "> +\t\t\t\tcompatible = \"simple-bus\";\n" "> +\t\t\t\treg = <0 0x100000>;\n" "> +\t\t\t};\n" @@ -52,4 +61,4 @@ "Thanks,\n" Mark. -8a8897e4e2a893af582e6e5e381d7e7f132a28b9a0bcc0affeb9a05e670054c9 +bdc0eb083f6abbfb2328b6175bac1bb28417180518731a0c72787b53c90475bd
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