All of lore.kernel.org
 help / color / mirror / Atom feed
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 0/9] arm64: Expose CPUID registers via emulation
Date: Tue, 10 Jan 2017 17:15:00 +0000	[thread overview]
Message-ID: <20170110171459.GH527@arm.com> (raw)
In-Reply-To: <1483982912-27215-1-git-send-email-suzuki.poulose@arm.com>

On Mon, Jan 09, 2017 at 05:28:23PM +0000, Suzuki K Poulose wrote:
> This series adds a new ABI to expose the CPU feature registers
> to the user space via emulation of MRS instruction. The system exposes
> only a limited set of feature values (See the documentation patch)
> from the cpufeature infrastructure. The feature bits that are not
> exposed are set to the 'safe value' which implies 'not supported'.
> 
> Apart from the selected feature registers, we expose MIDR_EL1 (Main
> ID Register). The user should be aware that, reading MIDR_EL1 can be
> tricky on a heterogeneous system (just like getcpu()). We export the
> value of the current CPU where 'MRS' is executed.
> 
> Applies on v4.10-rc3.

Thanks, I'll queue this for 4.11.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, catalin.marinas@arm.com,
	mark.rutland@arm.com, dave.martin@arm.com, aph@redhat.com,
	ryan.arnold@linaro.org, adhemerval.zanella@linaro.org,
	sid@reserved-bit.com
Subject: Re: [PATCH v4 0/9] arm64: Expose CPUID registers via emulation
Date: Tue, 10 Jan 2017 17:15:00 +0000	[thread overview]
Message-ID: <20170110171459.GH527@arm.com> (raw)
In-Reply-To: <1483982912-27215-1-git-send-email-suzuki.poulose@arm.com>

On Mon, Jan 09, 2017 at 05:28:23PM +0000, Suzuki K Poulose wrote:
> This series adds a new ABI to expose the CPU feature registers
> to the user space via emulation of MRS instruction. The system exposes
> only a limited set of feature values (See the documentation patch)
> from the cpufeature infrastructure. The feature bits that are not
> exposed are set to the 'safe value' which implies 'not supported'.
> 
> Apart from the selected feature registers, we expose MIDR_EL1 (Main
> ID Register). The user should be aware that, reading MIDR_EL1 can be
> tricky on a heterogeneous system (just like getcpu()). We export the
> value of the current CPU where 'MRS' is executed.
> 
> Applies on v4.10-rc3.

Thanks, I'll queue this for 4.11.

Will

  parent reply	other threads:[~2017-01-10 17:15 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-09 17:28 [PATCH v4 0/9] arm64: Expose CPUID registers via emulation Suzuki K Poulose
2017-01-09 17:28 ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 1/9] arm64: cpufeature: treat unknown fields as RES0 Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 2/9] arm64: cpufeature: remove explicit RAZ fields Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 3/9] arm64: cpufeature: Cleanup feature bit tables Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 4/9] arm64: cpufeature: Document the rules of safe value for features Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 5/9] arm64: cpufeature: Define helpers for sys_reg id Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 6/9] arm64: Add helper to decode register from instruction Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 7/9] arm64: cpufeature: Track user visible fields Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-10 14:24   ` Catalin Marinas
2017-01-10 14:24     ` Catalin Marinas
2017-01-10 14:25     ` Suzuki K Poulose
2017-01-10 14:25       ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 8/9] arm64: cpufeature: Expose CPUID registers by emulation Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-09 17:28 ` [PATCH v4 9/9] arm64: Documentation - Expose CPU feature registers Suzuki K Poulose
2017-01-09 17:28   ` Suzuki K Poulose
2017-01-10 17:15 ` Will Deacon [this message]
2017-01-10 17:15   ` [PATCH v4 0/9] arm64: Expose CPUID registers via emulation Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170110171459.GH527@arm.com \
    --to=will.deacon@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.