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* x86: Add SPI slaves to PCIe SPI master?
@ 2017-01-11 15:08 Alexander Stein
  2017-01-12 11:48 ` Andy Shevchenko
  0 siblings, 1 reply; 5+ messages in thread
From: Alexander Stein @ 2017-01-11 15:08 UTC (permalink / raw)
  To: linux-spi-u79uwXL29TY76Z2rM5mHXA

Hi,

I have a customer board using Baytrail E3805 CPU. I want to access a chip 
attached to SPI using spidev. but for this the slave has to be attached.
This is the corresponding lspci entry:
> 00:1e.5 Serial bus controller [0c80]: Intel Corporation Atom Processor 
Z36xxx/Z37xxx Series LPIO1 SPI Controller (rev 11)
PCIe vendor and product ID is 8086:0f0e

I tried using the following entry in APCI DSDT as a subnode to the SPI device:
> Device (TAMP)
> {
>     Name (_ADR, 1)
>     Name (_CID, "SPT0001") // Dummy name for spidev
>     Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
>     {
>         Name (UBUF, ResourceTemplate ()
>         {
>             SPISerialBus
>             (
>                 1,          //Slave select CS0 (_ADR)
>                 PolarityLow,        //Polarity of CS0 output(_DPL)
>                 FourWireMode,       //(_MOD)
>                 8,          //8-bit frame(_LEN)
>                 ControllerInitiated,    //(_SLV)
>                 2000000,       //Speed Hz (_SPE)
>                 ClockPolarityLow,  //(_POL)
>                 ClockPhaseFirst,   //(_PHA)
>                 "\\_SB.SPI1",          //Controller
>             )
>         })
>         Return (UBUF)
>     }
>     
>     Method (_STA, 0, NotSerialized)  // _STA: Status
>     {
>         Return (0x0F)
>     }
> }

Apparently this only works when the device is probed by ACPI but not when 
using PCIe (driver: pxa2xx_spi_pci). So I am wondering: How can I add a slave 
to this PCIe spi master.

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein
SYS TEC electronic GmbH
alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org

Legal and Commercial Address:
Am Windrad 2
08468 Heinsdorfergrund
Germany

Office: +49 (0) 3765 38600-0
Fax:    +49 (0) 3765 38600-4100
 
Managing Directors:
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	Director Commercial Affairs/COO: Dipl. Ing. (FH) Armin von Collrepp
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86: Add SPI slaves to PCIe SPI master?
  2017-01-11 15:08 x86: Add SPI slaves to PCIe SPI master? Alexander Stein
@ 2017-01-12 11:48 ` Andy Shevchenko
       [not found]   ` <CAHp75VePTOd9WhkOTxW6GwKE2X3VR39J-7Song-P6iKsi7V6Ww-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Andy Shevchenko @ 2017-01-12 11:48 UTC (permalink / raw)
  To: Alexander Stein; +Cc: linux-spi, Mika Westerberg

On Wed, Jan 11, 2017 at 5:08 PM, Alexander Stein
<alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org> wrote:
> Hi,
>
> I have a customer board using Baytrail E3805 CPU. I want to access a chip
> attached to SPI using spidev.

First of all, this is wrong approach. Do you have a driver for the
chip? Are going to develop one?
Elaborate, please.

> but for this the slave has to be attached.
> This is the corresponding lspci entry:
>> 00:1e.5 Serial bus controller [0c80]: Intel Corporation Atom Processor
> Z36xxx/Z37xxx Series LPIO1 SPI Controller (rev 11)
> PCIe vendor and product ID is 8086:0f0e

It's not what we are interested to see :-)

Basically you need
a) not ancient kernel (what's version of yours?);
b) check proper ACPI node for the PCIe device (something like _SB.PCI0.SPI1).

If there is no such node, just incorporate it using ACPI upgrade table
mechanism.

> I tried using the following entry in APCI DSDT as a subnode to the SPI device:
>> Device (TAMP)
>> {
>>     Name (_ADR, 1)
>>     Name (_CID, "SPT0001") // Dummy name for spidev
>>     Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
>>     {
>>         Name (UBUF, ResourceTemplate ()
>>         {
>>             SPISerialBus
>>             (
>>                 1,          //Slave select CS0 (_ADR)
>>                 PolarityLow,        //Polarity of CS0 output(_DPL)
>>                 FourWireMode,       //(_MOD)
>>                 8,          //8-bit frame(_LEN)
>>                 ControllerInitiated,    //(_SLV)
>>                 2000000,       //Speed Hz (_SPE)
>>                 ClockPolarityLow,  //(_POL)
>>                 ClockPhaseFirst,   //(_PHA)
>>                 "\\_SB.SPI1",          //Controller
>>             )
>>         })
>>         Return (UBUF)
>>     }
>>
>>     Method (_STA, 0, NotSerialized)  // _STA: Status
>>     {
>>         Return (0x0F)
>>     }
>> }
>
> Apparently this only works when the device is probed by ACPI but not when
> using PCIe (driver: pxa2xx_spi_pci). So I am wondering: How can I add a slave
> to this PCIe spi master.

Adding Mika to Cc list he might have some additional information to share.

-- 
With Best Regards,
Andy Shevchenko
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86: Add SPI slaves to PCIe SPI master?
       [not found]   ` <CAHp75VePTOd9WhkOTxW6GwKE2X3VR39J-7Song-P6iKsi7V6Ww-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-01-12 12:01     ` Mika Westerberg
       [not found]       ` <20170112120111.GY2330-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
  0 siblings, 1 reply; 5+ messages in thread
From: Mika Westerberg @ 2017-01-12 12:01 UTC (permalink / raw)
  To: Andy Shevchenko; +Cc: Alexander Stein, linux-spi

On Thu, Jan 12, 2017 at 01:48:13PM +0200, Andy Shevchenko wrote:
> On Wed, Jan 11, 2017 at 5:08 PM, Alexander Stein
> <alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org> wrote:
> > Hi,
> >
> > I have a customer board using Baytrail E3805 CPU. I want to access a chip
> > attached to SPI using spidev.
> 
> First of all, this is wrong approach. Do you have a driver for the
> chip? Are going to develop one?
> Elaborate, please.
> 
> > but for this the slave has to be attached.
> > This is the corresponding lspci entry:
> >> 00:1e.5 Serial bus controller [0c80]: Intel Corporation Atom Processor
> > Z36xxx/Z37xxx Series LPIO1 SPI Controller (rev 11)
> > PCIe vendor and product ID is 8086:0f0e
> 
> It's not what we are interested to see :-)
> 
> Basically you need
> a) not ancient kernel (what's version of yours?);
> b) check proper ACPI node for the PCIe device (something like _SB.PCI0.SPI1).

You can find the node by running following command

 # cat /sys/bus/pci/devices/0000:00:1e.5/firmware_node/path
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86: Add SPI slaves to PCIe SPI master?
       [not found]       ` <20170112120111.GY2330-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
@ 2017-01-12 13:39         ` Alexander Stein
  2017-01-12 13:47           ` Mika Westerberg
  0 siblings, 1 reply; 5+ messages in thread
From: Alexander Stein @ 2017-01-12 13:39 UTC (permalink / raw)
  To: Mika Westerberg; +Cc: Andy Shevchenko, linux-spi

On Thursday 12 January 2017 14:01:11, Mika Westerberg wrote:
> On Thu, Jan 12, 2017 at 01:48:13PM +0200, Andy Shevchenko wrote:
> > On Wed, Jan 11, 2017 at 5:08 PM, Alexander Stein
> > 
> > <alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org> wrote:
> > > Hi,
> > > 
> > > I have a customer board using Baytrail E3805 CPU. I want to access a
> > > chip
> > > attached to SPI using spidev.
> > 
> > First of all, this is wrong approach. Do you have a driver for the
> > chip? Are going to develop one?
> > Elaborate, please.

There is no driver and I won't do any either. Can't say much more about that, 
sorry.

> > > but for this the slave has to be attached.
> > > 
> > > This is the corresponding lspci entry:
> > >> 00:1e.5 Serial bus controller [0c80]: Intel Corporation Atom Processor
> > > 
> > > Z36xxx/Z37xxx Series LPIO1 SPI Controller (rev 11)
> > > PCIe vendor and product ID is 8086:0f0e
> > 
> > It's not what we are interested to see :-)
> > 
> > Basically you need
> > a) not ancient kernel (what's version of yours?);

This is a up-to-date archlinux, so I'm running 4.8.13-1-ARCH kernel.

> > b) check proper ACPI node for the PCIe device (something like
> > _SB.PCI0.SPI1).
> You can find the node by running following command
> 
>  # cat /sys/bus/pci/devices/0000:00:1e.5/firmware_node/path

result: \_SB_.PCI0.D023

The node itself is just:
> Device (D023)
> {
>     Name (_ADR, 0x001E0005)  // _ADR: Address
> }

Well, I'm not experienced with ACPI tables at all, but adding a device like in 
the 1st post I got my spi slave device, to my surprise I have to admit.

Thanks for that hint about the, kinda dummy, node for the PCIe device node. I 
didn't expect adding a slave device there would result in having a linux 
device too.

Best regards,
Alexander
-- 
Dipl.-Inf. Alexander Stein
SYS TEC electronic GmbH
alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org

Legal and Commercial Address:
Am Windrad 2
08468 Heinsdorfergrund
Germany

Office: +49 (0) 3765 38600-0
Fax:    +49 (0) 3765 38600-4100
 
Managing Directors:
	Director Technology/CEO: Dipl.-Phys. Siegmar Schmidt;
	Director Commercial Affairs/COO: Dipl. Ing. (FH) Armin von Collrepp
Commercial Registry:
	Amtsgericht Chemnitz, HRB 28082; USt.-Id Nr. DE150534010

--
To unsubscribe from this list: send the line "unsubscribe linux-spi" in
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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: x86: Add SPI slaves to PCIe SPI master?
  2017-01-12 13:39         ` Alexander Stein
@ 2017-01-12 13:47           ` Mika Westerberg
  0 siblings, 0 replies; 5+ messages in thread
From: Mika Westerberg @ 2017-01-12 13:47 UTC (permalink / raw)
  To: Alexander Stein; +Cc: Andy Shevchenko, linux-spi

On Thu, Jan 12, 2017 at 02:39:04PM +0100, Alexander Stein wrote:
> result: \_SB_.PCI0.D023
> 
> The node itself is just:
> > Device (D023)
> > {
> >     Name (_ADR, 0x001E0005)  // _ADR: Address
> > }
> 
> Well, I'm not experienced with ACPI tables at all, but adding a device like in 
> the 1st post I got my spi slave device, to my surprise I have to admit.
> 
> Thanks for that hint about the, kinda dummy, node for the PCIe device node. I 
> didn't expect adding a slave device there would result in having a linux 
> device too.

That node is needed because it provides _ADR that ACPI core uses to bind
the PCI device to the ACPI node. This further allows the SPI core ACPI
enumeration code to find your slave device under \_SB_.PCI0.D023.
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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-01-12 13:47 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-01-11 15:08 x86: Add SPI slaves to PCIe SPI master? Alexander Stein
2017-01-12 11:48 ` Andy Shevchenko
     [not found]   ` <CAHp75VePTOd9WhkOTxW6GwKE2X3VR39J-7Song-P6iKsi7V6Ww-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-12 12:01     ` Mika Westerberg
     [not found]       ` <20170112120111.GY2330-3PARRvDOhMZrdx17CPfAsdBPR1lH4CV8@public.gmane.org>
2017-01-12 13:39         ` Alexander Stein
2017-01-12 13:47           ` Mika Westerberg

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