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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Yi Sun <yi.y.sun@linux.intel.com>
Cc: wei.liu2@citrix.com, he.chen@linux.intel.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	jbeulich@suse.com, chao.p.peng@linux.intel.com,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes.
Date: Mon, 30 Jan 2017 17:05:47 -0500	[thread overview]
Message-ID: <20170130220547.GA13386@char.us.ORACLE.com> (raw)
In-Reply-To: <1484805686-7249-3-git-send-email-yi.y.sun@linux.intel.com>

On Thu, Jan 19, 2017 at 02:01:04PM +0800, Yi Sun wrote:
> The current cache allocation codes in psr.c do not consider
> future features addition and are not friendly to extend.
> 
> To make psr.c be more flexible to add new features and fulfill
> the program principle, open for extension but closed for
> modification, we have to refactor the psr.c:
> 1. Analyze cache allocation features and abstract general data
>    structures.
> 2. Analyze the init and all other functions flow, abstract all
>    steps that different features may have different implementations.
>    Make these steps be callback functions and register feature
>    specific fuctions. Then, the main processes will not be changed
>    when introducing a new feature.
> 
> Because the quantity of refactor codes is big and the logics are
> changed a lot, it will cause reviewers confused if just change
> old codes. Reviewers have to understand both old codes and new
> implementations. After review iterations from V1 to V3, Jan has
> proposed to remove all old cache allocation codes firstly, then
> implement new codes step by step. This will help to make codes
> be more easily reviewable.
> 
> There is no construction without destruction. So, this patch
> removes all current L3 CAT/CDP codes in psr.c. The following
> patches will introduce the new mechanism.
> 
> Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> Acked-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

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  reply	other threads:[~2017-01-30 22:06 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19  6:01 [PATCH RESEND v5 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2017-01-20  9:39   ` Tian, Kevin
2017-01-22  2:15     ` Yi Sun
2017-02-08  6:45       ` Tian, Kevin
2017-01-30 18:10   ` Konrad Rzeszutek Wilk
2017-01-30 20:39     ` Konrad Rzeszutek Wilk
2017-02-04  7:24       ` Yi Sun
2017-02-04  7:06     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-01-30 22:05   ` Konrad Rzeszutek Wilk [this message]
2017-01-19  6:01 ` [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-01-30 22:20   ` Konrad Rzeszutek Wilk
2017-01-31 10:10     ` Jan Beulich
2017-01-31 14:12       ` Konrad Rzeszutek Wilk
2017-01-31 15:07         ` Jan Beulich
2017-01-31 17:32           ` Konrad Rzeszutek Wilk
2017-02-05  1:53     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-31  2:44   ` Konrad Rzeszutek Wilk
2017-01-31 10:14     ` Jan Beulich
2017-01-31 14:13       ` Konrad Rzeszutek Wilk
2017-01-31 10:53     ` Andrew Cooper
2017-01-19  6:01 ` [PATCH RESEND v5 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-31 19:52   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-31 20:17   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-31 20:29   ` Konrad Rzeszutek Wilk
2017-02-07  2:47     ` Yi Sun
2017-02-07 13:56       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-31 20:57   ` Konrad Rzeszutek Wilk
2017-02-07  2:51     ` Yi Sun
2017-02-07 13:57       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 15/24] x86: refactor psr: implement get value " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 20/24] x86: L2 CAT: implement set " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-27 15:18   ` Wei Liu

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