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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>,
	xen-devel@lists.xenproject.org, he.chen@linux.intel.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	chao.p.peng@linux.intel.com, wei.liu2@citrix.com
Subject: Re: [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow.
Date: Tue, 31 Jan 2017 09:13:11 -0500	[thread overview]
Message-ID: <20170131141311.GD11895@char.us.ORACLE.com> (raw)
In-Reply-To: <5890719102000078001354DD@prv-mh.provo.novell.com>

On Tue, Jan 31, 2017 at 03:14:25AM -0700, Jan Beulich wrote:
> >>> On 31.01.17 at 03:44, <konrad.wilk@oracle.com> wrote:
> > On Thu, Jan 19, 2017 at 02:01:06PM +0800, Yi Sun wrote:
> >> @@ -127,6 +130,13 @@ struct feat_node {
> >>      struct list_head list;
> >>  };
> >>  
> >> +struct cpuid_leaf_regs {
> >> +    unsigned int eax;
> >> +    unsigned int ebx;
> >> +    unsigned int ecx;
> >> +    unsigned int edx;
> >> +};
> > 
> > Could you use 'struct cpuid_leaf' in x86_emulate.h ?
> > 
> > It would only require "#include <asm/x86_emulate.h>" I believe.
> 
> Indeed - I recall specifically having asked for that.
> 
> >>  static int psr_cpu_prepare(unsigned int cpu)
> >>  {
> >> +    if ( !socket_info )
> >> +        return 0;
> >> +
> >> +    /* Malloc memory for the global feature head here. */
> >> +    if ( feat_l3_cat == NULL &&
> >> +         (feat_l3_cat = xzalloc(struct feat_node)) == NULL )
> > 
> > /me scratches his head.
> > 
> > Lets say we have a two socket machine. Each socket has
> > two CPUs (so total of 4 CPUs).
> > 
> > On CPU0  (in psr_presmp_init) it allocates feat_l3_cat. Then
> > later in (in psr_presmp_init) you call psr_cpu_init which
> > sets feat_l3_cat to NULL (and 'feat' is feat_l3_cat).
> > 
> > When CPU1 starts up then, psr_cpu_prepare is called
> > which means we allocate a new feat_l3_cat. 'cpu_init_work'
> > short-circuits (as info->feat_mask has a value) and does not
> > do anything.
> > 
> > When CPU2 (socket two), starts up then feat_l3_cat (as 'feat')
> > is used (in psr_cpu_init and again sets feat_l3_cat to NULL).
> > 
> > The last CPU3 (socket #2) starts up, and since feat_l3_cat is
> > NULL - it is allocated. But in 'cpu_init_work' it short-circuits
> > so we don't use third allocated 'feat_l3_cat' .
> > 
> > And we have an 'feat_l3_cat' that is not used for anything..
> > 
> > In other words - a memory leak. Granted a very small one.
> 
> I did recommend to do it that way, to simplify things a little.

Aha! In which case perhaps a little comment saying that it is
OK to have this one memory leak to make the code simpler.


> 
> Jan
> 

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  reply	other threads:[~2017-01-31 14:13 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19  6:01 [PATCH RESEND v5 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 01/24] docs: create L2 Cache Allocation Technology (CAT) feature document Yi Sun
2017-01-20  9:39   ` Tian, Kevin
2017-01-22  2:15     ` Yi Sun
2017-02-08  6:45       ` Tian, Kevin
2017-01-30 18:10   ` Konrad Rzeszutek Wilk
2017-01-30 20:39     ` Konrad Rzeszutek Wilk
2017-02-04  7:24       ` Yi Sun
2017-02-04  7:06     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-01-30 22:05   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-01-30 22:20   ` Konrad Rzeszutek Wilk
2017-01-31 10:10     ` Jan Beulich
2017-01-31 14:12       ` Konrad Rzeszutek Wilk
2017-01-31 15:07         ` Jan Beulich
2017-01-31 17:32           ` Konrad Rzeszutek Wilk
2017-02-05  1:53     ` Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-01-31  2:44   ` Konrad Rzeszutek Wilk
2017-01-31 10:14     ` Jan Beulich
2017-01-31 14:13       ` Konrad Rzeszutek Wilk [this message]
2017-01-31 10:53     ` Andrew Cooper
2017-01-19  6:01 ` [PATCH RESEND v5 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-01-31 19:52   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-01-31 20:17   ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-01-31 20:29   ` Konrad Rzeszutek Wilk
2017-02-07  2:47     ` Yi Sun
2017-02-07 13:56       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-01-31 20:57   ` Konrad Rzeszutek Wilk
2017-02-07  2:51     ` Yi Sun
2017-02-07 13:57       ` Konrad Rzeszutek Wilk
2017-01-19  6:01 ` [PATCH RESEND v5 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 15/24] x86: refactor psr: implement get value " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 20/24] x86: L2 CAT: implement set " Yi Sun
2017-01-19  6:01 ` [PATCH RESEND v5 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 23/24] tools: L2 CAT: support set " Yi Sun
2017-01-27 15:18   ` Wei Liu
2017-01-19  6:01 ` [PATCH RESEND v5 24/24] docs: add L2 CAT description in docs Yi Sun
2017-01-27 15:18   ` Wei Liu

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