From: Ingo Molnar <mingo@kernel.org>
To: Mike Galbraith <efault@gmx.de>, Thomas Gleixner <tglx@linutronix.de>
Cc: Matt Fleming <matt@codeblueprint.co.uk>,
lkml <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@elte.hu>, Marc Zyngier <marc.zyngier@arm.com>
Subject: Re: WARNING: CPU: 1 PID: 15 at kernel/sched/sched.h:804 assert_clock_updated.isra.62.part.63+0x25/0x27
Date: Tue, 31 Jan 2017 17:25:00 +0100 [thread overview]
Message-ID: <20170131162500.GA14938@gmail.com> (raw)
In-Reply-To: <1485861474.4419.3.camel@gmx.de>
* Mike Galbraith <efault@gmx.de> wrote:
> On Tue, 2017-01-31 at 09:54 +0100, Ingo Molnar wrote:
>
> > > Fast ain't gonna happen, 5bf728f02218 bricked.
> >
> > :-/
> >
> > Next point would be f9a42e0d58cf I suspect, to establish that Linus's latest
> > kernel is fine. That means it's in one of the ~200 -tip commits - should be
> > bisectable in 8-10 steps from that point on.
>
> It bisected cleanly to the below, confirmed via quilt push/pop revert.
> According to the symptoms my box exhibits, patchlet needs to be
> twiddled to ensure that interrupts are enabled at _least_ once ;-)
>
> 08d85f3ea99f1eeafc4e8507936190e86a16ee8c is the first bad commit
> commit 08d85f3ea99f1eeafc4e8507936190e86a16ee8c
> Author: Marc Zyngier <marc.zyngier@arm.com>
> Date: Tue Jan 17 16:00:48 2017 +0000
>
> irqdomain: Avoid activating interrupts more than once
Fantastic, thanks Mike!
Ingo
prev parent reply other threads:[~2017-01-31 16:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-28 7:21 WARNING: CPU: 1 PID: 15 at kernel/sched/sched.h:804 assert_clock_updated.isra.62.part.63+0x25/0x27 Mike Galbraith
2017-01-30 11:59 ` Matt Fleming
2017-01-31 6:19 ` Mike Galbraith
2017-01-31 7:28 ` Ingo Molnar
2017-01-31 7:35 ` Mike Galbraith
2017-01-31 7:45 ` Ingo Molnar
2017-01-31 8:07 ` Mike Galbraith
2017-01-31 8:51 ` Mike Galbraith
2017-01-31 8:54 ` Ingo Molnar
2017-01-31 11:17 ` Mike Galbraith
2017-01-31 16:25 ` Ingo Molnar [this message]
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