* Re: [PATCH v3 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-08 8:42 ` Arnd Bergmann
0 siblings, 0 replies; 32+ messages in thread
From: Arnd Bergmann @ 2017-02-08 8:42 UTC (permalink / raw)
To: Jayachandran C
Cc: devicetree@vger.kernel.org, arm@kernel.org, Catalin Marinas,
Will Deacon, Rob Herring, linux-arm-kernel@lists.infradead.org
On Wed, Feb 8, 2017 at 6:32 AM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> On Tue, Feb 07, 2017 at 04:35:24PM -0600, Rob Herring wrote:
>> On Tue, Feb 7, 2017 at 3:19 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
>> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > new file mode 100644
>> > index 0000000..82276a2
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > @@ -0,0 +1,5 @@
>> > +Cavium Thunder2 Family device tree bindings
>> > +-------------------------------------------
>> > +
>> > +Boards with Cavium ThunderX2 CN99XX shall have the root property:
>> > + compatible = "cavium,thunder-99xx";
>>
>> Is it ThunderX2 or Thunder2? What happened to "CN" in the compatible
>> string. There's a lot of inconsistencies here.
>
> I have followed the exiting Thunder naming as well as general DT
> conventions, Basically:
>
> Platform - ARCH_THUNDER2 (for ThunderX2 CN99XX, ARCH_THUNDER is
> for ThunderX CN8?XX)
The platform name is fine, we don't care too much about that as it is
easily changed
if necessary.
> Core - cavium,thunder2 (ThunderX2 cpu core, "cavium,thunder" is ThunderX core)
> Board/SoC - cavium,thunder-99xx (for ThunderX2, "cavium,thunder-88xx"
> is existing ThunderX board)
>
> Thunder2 because it is based on the next generation Thunder core, and
> processor family is ThunderX2 CN99XX.
>
> I had thought thru other possibilities as well, this seems the best I
> could come up with.
We should really avoid having the 'xx' placeholder in there but instead put
actual chip names in the compatible string, preferably the real ID such as
"cn8890" for the older chip. I see that we got it wrong for thunder-88xx.dts,
but that is no reason to duplicate the mistake.
Arnd
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v3 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-09 19:05 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:05 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 08, 2017 at 09:42:38AM +0100, Arnd Bergmann wrote:
> On Wed, Feb 8, 2017 at 6:32 AM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> > On Tue, Feb 07, 2017 at 04:35:24PM -0600, Rob Herring wrote:
> >> On Tue, Feb 7, 2017 at 3:19 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > new file mode 100644
> >> > index 0000000..82276a2
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > @@ -0,0 +1,5 @@
> >> > +Cavium Thunder2 Family device tree bindings
> >> > +-------------------------------------------
> >> > +
> >> > +Boards with Cavium ThunderX2 CN99XX shall have the root property:
> >> > + compatible = "cavium,thunder-99xx";
> >>
> >> Is it ThunderX2 or Thunder2? What happened to "CN" in the compatible
> >> string. There's a lot of inconsistencies here.
> >
> > I have followed the exiting Thunder naming as well as general DT
> > conventions, Basically:
> >
> > Platform - ARCH_THUNDER2 (for ThunderX2 CN99XX, ARCH_THUNDER is
> > for ThunderX CN8?XX)
>
> The platform name is fine, we don't care too much about that as it is
> easily changed
> if necessary.
>
> > Core - cavium,thunder2 (ThunderX2 cpu core, "cavium,thunder" is ThunderX core)
> > Board/SoC - cavium,thunder-99xx (for ThunderX2, "cavium,thunder-88xx"
> > is existing ThunderX board)
> >
> > Thunder2 because it is based on the next generation Thunder core, and
> > processor family is ThunderX2 CN99XX.
> >
> > I had thought thru other possibilities as well, this seems the best I
> > could come up with.
>
> We should really avoid having the 'xx' placeholder in there but instead put
> actual chip names in the compatible string, preferably the real ID such as
> "cn8890" for the older chip. I see that we got it wrong for thunder-88xx.dts,
> but that is no reason to duplicate the mistake.
Ok. Looks like 1,2,5 of the patchset is already applied. Thanks!
I will follow up with v4 of 3,4 with a better ID.
JC.
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v3 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-09 19:05 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:05 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Rob Herring, arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
Catalin Marinas, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Wed, Feb 08, 2017 at 09:42:38AM +0100, Arnd Bergmann wrote:
> On Wed, Feb 8, 2017 at 6:32 AM, Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> > On Tue, Feb 07, 2017 at 04:35:24PM -0600, Rob Herring wrote:
> >> On Tue, Feb 7, 2017 at 3:19 PM, Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > new file mode 100644
> >> > index 0000000..82276a2
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > @@ -0,0 +1,5 @@
> >> > +Cavium Thunder2 Family device tree bindings
> >> > +-------------------------------------------
> >> > +
> >> > +Boards with Cavium ThunderX2 CN99XX shall have the root property:
> >> > + compatible = "cavium,thunder-99xx";
> >>
> >> Is it ThunderX2 or Thunder2? What happened to "CN" in the compatible
> >> string. There's a lot of inconsistencies here.
> >
> > I have followed the exiting Thunder naming as well as general DT
> > conventions, Basically:
> >
> > Platform - ARCH_THUNDER2 (for ThunderX2 CN99XX, ARCH_THUNDER is
> > for ThunderX CN8?XX)
>
> The platform name is fine, we don't care too much about that as it is
> easily changed
> if necessary.
>
> > Core - cavium,thunder2 (ThunderX2 cpu core, "cavium,thunder" is ThunderX core)
> > Board/SoC - cavium,thunder-99xx (for ThunderX2, "cavium,thunder-88xx"
> > is existing ThunderX board)
> >
> > Thunder2 because it is based on the next generation Thunder core, and
> > processor family is ThunderX2 CN99XX.
> >
> > I had thought thru other possibilities as well, this seems the best I
> > could come up with.
>
> We should really avoid having the 'xx' placeholder in there but instead put
> actual chip names in the compatible string, preferably the real ID such as
> "cn8890" for the older chip. I see that we got it wrong for thunder-88xx.dts,
> but that is no reason to duplicate the mistake.
Ok. Looks like 1,2,5 of the patchset is already applied. Thanks!
I will follow up with v4 of 3,4 with a better ID.
JC.
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v4 3/5] arm64: dts: add device tree for ARCH_THUNDER2
@ 2017-02-09 19:12 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:12 UTC (permalink / raw)
To: linux-arm-kernel
Add a device tree file for boards using the Cavium's ThunderX2 CN99XX
ARM64 processors. The SoC is compatible with the discontinued Broadcom
Vulcan ARM64 SoC.
Update the Makefile to build the thunder-99xx.dtb when ARCH_THUNDER2
option is selected.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
Patches 1,2,5 of this series have been applied, sending this with
suggested changes to compat string.
v3->v4
* compat ID updated to follow convention.
arch/arm64/boot/dts/cavium/Makefile | 1 +
arch/arm64/boot/dts/cavium/thunder-99xx.dts | 34 +++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dts
diff --git a/arch/arm64/boot/dts/cavium/Makefile b/arch/arm64/boot/dts/cavium/Makefile
index e34f89d..557c8be 100644
--- a/arch/arm64/boot/dts/cavium/Makefile
+++ b/arch/arm64/boot/dts/cavium/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_THUNDER) += thunder-88xx.dtb
+dtb-$(CONFIG_ARCH_THUNDER2) += thunder-99xx.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/cavium/thunder-99xx.dts b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
new file mode 100644
index 0000000..6d6e8af
--- /dev/null
+++ b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
@@ -0,0 +1,34 @@
+/*
+ * dts file for Cavium ThunderX2 CN99XX based Evaluation Boards
+ *
+ * Copyright (c) 2017 Cavium Inc.
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "../broadcom/vulcan.dtsi"
+
+/ {
+ model = "Cavium ThunderX2 CN99XX";
+ compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v4 3/5] arm64: dts: add device tree for ARCH_THUNDER2
@ 2017-02-09 19:12 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:12 UTC (permalink / raw)
To: arm-DgEjT+Ai2ygdnm+yROfE0A, Arnd Bergmann, Catalin Marinas,
Will Deacon, Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Jayachandran C
Add a device tree file for boards using the Cavium's ThunderX2 CN99XX
ARM64 processors. The SoC is compatible with the discontinued Broadcom
Vulcan ARM64 SoC.
Update the Makefile to build the thunder-99xx.dtb when ARCH_THUNDER2
option is selected.
Signed-off-by: Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
---
Patches 1,2,5 of this series have been applied, sending this with
suggested changes to compat string.
v3->v4
* compat ID updated to follow convention.
arch/arm64/boot/dts/cavium/Makefile | 1 +
arch/arm64/boot/dts/cavium/thunder-99xx.dts | 34 +++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 arch/arm64/boot/dts/cavium/thunder-99xx.dts
diff --git a/arch/arm64/boot/dts/cavium/Makefile b/arch/arm64/boot/dts/cavium/Makefile
index e34f89d..557c8be 100644
--- a/arch/arm64/boot/dts/cavium/Makefile
+++ b/arch/arm64/boot/dts/cavium/Makefile
@@ -1,4 +1,5 @@
dtb-$(CONFIG_ARCH_THUNDER) += thunder-88xx.dtb
+dtb-$(CONFIG_ARCH_THUNDER2) += thunder-99xx.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/cavium/thunder-99xx.dts b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
new file mode 100644
index 0000000..6d6e8af
--- /dev/null
+++ b/arch/arm64/boot/dts/cavium/thunder-99xx.dts
@@ -0,0 +1,34 @@
+/*
+ * dts file for Cavium ThunderX2 CN99XX based Evaluation Boards
+ *
+ * Copyright (c) 2017 Cavium Inc.
+ * Copyright (c) 2013-2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "../broadcom/vulcan.dtsi"
+
+/ {
+ model = "Cavium ThunderX2 CN99XX";
+ compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
+ <0x00000008 0x80000000 0x0 0x80000000>; /* 2G @ 34G */
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
--
2.7.4
--
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^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
2017-02-08 8:42 ` Arnd Bergmann
@ 2017-02-09 19:13 ` Jayachandran C
-1 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:13 UTC (permalink / raw)
To: linux-arm-kernel
Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
The the SoC will use the ID "cavium,thunderx2-cn9900".
Add documentation entry for the "cavium,thunder2" cpu core as well.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
v3->v4
Documentation updates to reflect changes in device tree.
Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 9 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
new file mode 100644
index 0000000..dc5dd65
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
@@ -0,0 +1,8 @@
+Cavium ThunderX2 CN99XX platform tree bindings
+----------------------------------------------
+
+Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
+ compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
+
+These SoC uses the "cavium,thunder2" core which will be compatible
+with "brcm,vulcan".
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index a1bcfee..74f0b23 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
"brcm,brahma-b15"
"brcm,vulcan"
"cavium,thunder"
+ "cavium,thunder2"
"faraday,fa526"
"intel,sa110"
"intel,sa1100"
--
2.7.4
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-09 19:13 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-09 19:13 UTC (permalink / raw)
To: arm, Arnd Bergmann, Catalin Marinas, Will Deacon, Rob Herring,
devicetree, linux-arm-kernel
Cc: Jayachandran C
Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
The the SoC will use the ID "cavium,thunderx2-cn9900".
Add documentation entry for the "cavium,thunder2" cpu core as well.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
---
v3->v4
Documentation updates to reflect changes in device tree.
Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 9 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
new file mode 100644
index 0000000..dc5dd65
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
@@ -0,0 +1,8 @@
+Cavium ThunderX2 CN99XX platform tree bindings
+----------------------------------------------
+
+Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
+ compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
+
+These SoC uses the "cavium,thunder2" core which will be compatible
+with "brcm,vulcan".
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index a1bcfee..74f0b23 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
"brcm,brahma-b15"
"brcm,vulcan"
"cavium,thunder"
+ "cavium,thunder2"
"faraday,fa526"
"intel,sa110"
"intel,sa1100"
--
2.7.4
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
2017-02-09 19:13 ` Jayachandran C
@ 2017-02-10 14:55 ` Rob Herring
-1 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2017-02-10 14:55 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> The the SoC will use the ID "cavium,thunderx2-cn9900".
>
> Add documentation entry for the "cavium,thunder2" cpu core as well.
>
> Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
> ---
>
> v3->v4
> Documentation updates to reflect changes in device tree.
>
> Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 2 files changed, 9 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> new file mode 100644
> index 0000000..dc5dd65
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> @@ -0,0 +1,8 @@
> +Cavium ThunderX2 CN99XX platform tree bindings
> +----------------------------------------------
> +
> +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> +
> +These SoC uses the "cavium,thunder2" core which will be compatible
> +with "brcm,vulcan".
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index a1bcfee..74f0b23 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> "brcm,brahma-b15"
> "brcm,vulcan"
> "cavium,thunder"
> + "cavium,thunder2"
Is this the same as brcm,vulcan?
> "faraday,fa526"
> "intel,sa110"
> "intel,sa1100"
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-10 14:55 ` Rob Herring
0 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2017-02-10 14:55 UTC (permalink / raw)
To: Jayachandran C
Cc: devicetree@vger.kernel.org, Arnd Bergmann, Catalin Marinas,
Will Deacon, arm@kernel.org, linux-arm-kernel@lists.infradead.org
On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> The the SoC will use the ID "cavium,thunderx2-cn9900".
>
> Add documentation entry for the "cavium,thunder2" cpu core as well.
>
> Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
> ---
>
> v3->v4
> Documentation updates to reflect changes in device tree.
>
> Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 2 files changed, 9 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> new file mode 100644
> index 0000000..dc5dd65
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> @@ -0,0 +1,8 @@
> +Cavium ThunderX2 CN99XX platform tree bindings
> +----------------------------------------------
> +
> +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> +
> +These SoC uses the "cavium,thunder2" core which will be compatible
> +with "brcm,vulcan".
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index a1bcfee..74f0b23 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> "brcm,brahma-b15"
> "brcm,vulcan"
> "cavium,thunder"
> + "cavium,thunder2"
Is this the same as brcm,vulcan?
> "faraday,fa526"
> "intel,sa110"
> "intel,sa1100"
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-10 15:07 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-10 15:07 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> > The the SoC will use the ID "cavium,thunderx2-cn9900".
> >
> > Add documentation entry for the "cavium,thunder2" cpu core as well.
> >
> > Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
> > ---
> >
> > v3->v4
> > Documentation updates to reflect changes in device tree.
> >
> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> > 2 files changed, 9 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >
> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> > new file mode 100644
> > index 0000000..dc5dd65
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> > @@ -0,0 +1,8 @@
> > +Cavium ThunderX2 CN99XX platform tree bindings
> > +----------------------------------------------
> > +
> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> > +
> > +These SoC uses the "cavium,thunder2" core which will be compatible
> > +with "brcm,vulcan".
> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> > index a1bcfee..74f0b23 100644
> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> > "brcm,brahma-b15"
> > "brcm,vulcan"
> > "cavium,thunder"
> > + "cavium,thunder2"
>
> Is this the same as brcm,vulcan?
It will have a different CPU ID, with different implementer and part num,
but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
maybe "brcm,vulcan" after that.
JC.
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-10 15:07 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-10 15:07 UTC (permalink / raw)
To: Rob Herring
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Arnd Bergmann,
Catalin Marinas, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> > The the SoC will use the ID "cavium,thunderx2-cn9900".
> >
> > Add documentation entry for the "cavium,thunder2" cpu core as well.
> >
> > Signed-off-by: Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
> > ---
> >
> > v3->v4
> > Documentation updates to reflect changes in device tree.
> >
> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> > 2 files changed, 9 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >
> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> > new file mode 100644
> > index 0000000..dc5dd65
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> > @@ -0,0 +1,8 @@
> > +Cavium ThunderX2 CN99XX platform tree bindings
> > +----------------------------------------------
> > +
> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> > +
> > +These SoC uses the "cavium,thunder2" core which will be compatible
> > +with "brcm,vulcan".
> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> > index a1bcfee..74f0b23 100644
> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> > "brcm,brahma-b15"
> > "brcm,vulcan"
> > "cavium,thunder"
> > + "cavium,thunder2"
>
> Is this the same as brcm,vulcan?
It will have a different CPU ID, with different implementer and part num,
but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
maybe "brcm,vulcan" after that.
JC.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
2017-02-10 15:07 ` Jayachandran C
@ 2017-02-10 17:32 ` Rob Herring
-1 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2017-02-10 17:32 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C
<jnair@caviumnetworks.com> wrote:
> On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
>> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
>> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
>> > The the SoC will use the ID "cavium,thunderx2-cn9900".
>> >
>> > Add documentation entry for the "cavium,thunder2" cpu core as well.
>> >
>> > Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
>> > ---
>> >
>> > v3->v4
>> > Documentation updates to reflect changes in device tree.
>> >
>> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
>> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
>> > 2 files changed, 9 insertions(+)
>> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> >
>> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > new file mode 100644
>> > index 0000000..dc5dd65
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > @@ -0,0 +1,8 @@
>> > +Cavium ThunderX2 CN99XX platform tree bindings
>> > +----------------------------------------------
>> > +
>> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
>> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
>> > +
>> > +These SoC uses the "cavium,thunder2" core which will be compatible
>> > +with "brcm,vulcan".
>> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
>> > index a1bcfee..74f0b23 100644
>> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
>> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
>> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
>> > "brcm,brahma-b15"
>> > "brcm,vulcan"
>> > "cavium,thunder"
>> > + "cavium,thunder2"
>>
>> Is this the same as brcm,vulcan?
>
> It will have a different CPU ID, with different implementer and part num,
> but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
> ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
> maybe "brcm,vulcan" after that.
Okay, new ID registers is good enough reason. I'd just let brcm,vulcan
die though I have no idea how many Broadcom systems there are out in
the wild (and ones that you care about DT on).
Acked-by: Rob Herring <robh@kernel.org>
Rob
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-10 17:32 ` Rob Herring
0 siblings, 0 replies; 32+ messages in thread
From: Rob Herring @ 2017-02-10 17:32 UTC (permalink / raw)
To: Jayachandran C
Cc: devicetree@vger.kernel.org, Arnd Bergmann, Catalin Marinas,
Will Deacon, arm@kernel.org, linux-arm-kernel@lists.infradead.org
On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C
<jnair@caviumnetworks.com> wrote:
> On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
>> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
>> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
>> > The the SoC will use the ID "cavium,thunderx2-cn9900".
>> >
>> > Add documentation entry for the "cavium,thunder2" cpu core as well.
>> >
>> > Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
>> > ---
>> >
>> > v3->v4
>> > Documentation updates to reflect changes in device tree.
>> >
>> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
>> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
>> > 2 files changed, 9 insertions(+)
>> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> >
>> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > new file mode 100644
>> > index 0000000..dc5dd65
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
>> > @@ -0,0 +1,8 @@
>> > +Cavium ThunderX2 CN99XX platform tree bindings
>> > +----------------------------------------------
>> > +
>> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
>> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
>> > +
>> > +These SoC uses the "cavium,thunder2" core which will be compatible
>> > +with "brcm,vulcan".
>> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
>> > index a1bcfee..74f0b23 100644
>> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
>> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
>> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
>> > "brcm,brahma-b15"
>> > "brcm,vulcan"
>> > "cavium,thunder"
>> > + "cavium,thunder2"
>>
>> Is this the same as brcm,vulcan?
>
> It will have a different CPU ID, with different implementer and part num,
> but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
> ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
> maybe "brcm,vulcan" after that.
Okay, new ID registers is good enough reason. I'd just let brcm,vulcan
die though I have no idea how many Broadcom systems there are out in
the wild (and ones that you care about DT on).
Acked-by: Rob Herring <robh@kernel.org>
Rob
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-11 16:05 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-11 16:05 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 10, 2017 at 11:32:29AM -0600, Rob Herring wrote:
> On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C
> <jnair@caviumnetworks.com> wrote:
> > On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
> >> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair@caviumnetworks.com> wrote:
> >> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> >> > The the SoC will use the ID "cavium,thunderx2-cn9900".
> >> >
> >> > Add documentation entry for the "cavium,thunder2" cpu core as well.
> >> >
> >> > Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
> >> > ---
> >> >
> >> > v3->v4
> >> > Documentation updates to reflect changes in device tree.
> >> >
> >> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> >> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> >> > 2 files changed, 9 insertions(+)
> >> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> >
> >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > new file mode 100644
> >> > index 0000000..dc5dd65
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > @@ -0,0 +1,8 @@
> >> > +Cavium ThunderX2 CN99XX platform tree bindings
> >> > +----------------------------------------------
> >> > +
> >> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> >> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> >> > +
> >> > +These SoC uses the "cavium,thunder2" core which will be compatible
> >> > +with "brcm,vulcan".
> >> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> >> > index a1bcfee..74f0b23 100644
> >> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> >> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> >> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> >> > "brcm,brahma-b15"
> >> > "brcm,vulcan"
> >> > "cavium,thunder"
> >> > + "cavium,thunder2"
> >>
> >> Is this the same as brcm,vulcan?
> >
> > It will have a different CPU ID, with different implementer and part num,
> > but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
> > ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
> > maybe "brcm,vulcan" after that.
>
> Okay, new ID registers is good enough reason. I'd just let brcm,vulcan
> die though I have no idea how many Broadcom systems there are out in
> the wild (and ones that you care about DT on).
This is not an issue. Broadcom did not take the chip into production, and
the eval systems are at the new habitat :)
> Acked-by: Rob Herring <robh@kernel.org>
Thanks,
JC.
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v4 4/5] dt-bindings: arm64 ARCH_THUNDER2 platform documentation
@ 2017-02-11 16:05 ` Jayachandran C
0 siblings, 0 replies; 32+ messages in thread
From: Jayachandran C @ 2017-02-11 16:05 UTC (permalink / raw)
To: Rob Herring
Cc: arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Arnd Bergmann,
Catalin Marinas, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Fri, Feb 10, 2017 at 11:32:29AM -0600, Rob Herring wrote:
> On Fri, Feb 10, 2017 at 9:07 AM, Jayachandran C
> <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> > On Fri, Feb 10, 2017 at 08:55:31AM -0600, Rob Herring wrote:
> >> On Thu, Feb 9, 2017 at 1:13 PM, Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> >> > Add documentation for Cavium ThunderX2 CN99XX ARM64 processor family.
> >> > The the SoC will use the ID "cavium,thunderx2-cn9900".
> >> >
> >> > Add documentation entry for the "cavium,thunder2" cpu core as well.
> >> >
> >> > Signed-off-by: Jayachandran C <jnair-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
> >> > ---
> >> >
> >> > v3->v4
> >> > Documentation updates to reflect changes in device tree.
> >> >
> >> > Documentation/devicetree/bindings/arm/cavium-thunder2.txt | 8 ++++++++
> >> > Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> >> > 2 files changed, 9 insertions(+)
> >> > create mode 100644 Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> >
> >> > diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > new file mode 100644
> >> > index 0000000..dc5dd65
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
> >> > @@ -0,0 +1,8 @@
> >> > +Cavium ThunderX2 CN99XX platform tree bindings
> >> > +----------------------------------------------
> >> > +
> >> > +Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
> >> > + compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
> >> > +
> >> > +These SoC uses the "cavium,thunder2" core which will be compatible
> >> > +with "brcm,vulcan".
> >> > diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> >> > index a1bcfee..74f0b23 100644
> >> > --- a/Documentation/devicetree/bindings/arm/cpus.txt
> >> > +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> >> > @@ -169,6 +169,7 @@ nodes to be present and contain the properties described below.
> >> > "brcm,brahma-b15"
> >> > "brcm,vulcan"
> >> > "cavium,thunder"
> >> > + "cavium,thunder2"
> >>
> >> Is this the same as brcm,vulcan?
> >
> > It will have a different CPU ID, with different implementer and part num,
> > but compatible with "brcm,vulcan". In the ThunderX2 dtsi file (once
> > ARCH_VULCAN goes away), we want to be compatable = "cavium,thunder2", with
> > maybe "brcm,vulcan" after that.
>
> Okay, new ID registers is good enough reason. I'd just let brcm,vulcan
> die though I have no idea how many Broadcom systems there are out in
> the wild (and ones that you care about DT on).
This is not an issue. Broadcom did not take the chip into production, and
the eval systems are at the new habitat :)
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Thanks,
JC.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 32+ messages in thread