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From: Peter Zijlstra <peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
To: Suravee Suthikulpanit
	<Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v8 9/9] perf/amd/iommu: Enable support for multiple IOMMUs
Date: Tue, 14 Feb 2017 13:31:49 +0100	[thread overview]
Message-ID: <20170214123149.GV6515@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <af2bca1a-59a9-d36c-a700-ca5360852543-5C7GfCeVMHo@public.gmane.org>

On Tue, Feb 07, 2017 at 08:57:52AM +0700, Suravee Suthikulpanit wrote:
> >But instead it looks like you get the counter form:
> >
> >  #define _GET_CNTR(ev)       ((u8)(ev->hw.extra_reg.reg))
> >
> >Which is absolutely insane.
> >
> 
> So, the IOMMU counters are grouped into bank, and there could be
> many banks. I use the extra_reg.reg to hold the bank and counter
> indices. This will be used to program onto the counter configuration
> register. This is handled in get_next_avail_iommu_bnk_cntr() and
> clear_avail_iommu_bnk_cntr().

But this is crazy. That's not what extra_regs are for. Also, who cares
about the banks, why is this exposed?

That is, I would very much expect a linear range of counters. You can
always decompose this counter number if you really need to somewhere
down near the hardware accessors.

WARNING: multiple messages have this Message-ID (diff)
From: Peter Zijlstra <peterz@infradead.org>
To: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	joro@8bytes.org, bp@alien8.de, mingo@redhat.com
Subject: Re: [PATCH v8 9/9] perf/amd/iommu: Enable support for multiple IOMMUs
Date: Tue, 14 Feb 2017 13:31:49 +0100	[thread overview]
Message-ID: <20170214123149.GV6515@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <af2bca1a-59a9-d36c-a700-ca5360852543@amd.com>

On Tue, Feb 07, 2017 at 08:57:52AM +0700, Suravee Suthikulpanit wrote:
> >But instead it looks like you get the counter form:
> >
> >  #define _GET_CNTR(ev)       ((u8)(ev->hw.extra_reg.reg))
> >
> >Which is absolutely insane.
> >
> 
> So, the IOMMU counters are grouped into bank, and there could be
> many banks. I use the extra_reg.reg to hold the bank and counter
> indices. This will be used to program onto the counter configuration
> register. This is handled in get_next_avail_iommu_bnk_cntr() and
> clear_avail_iommu_bnk_cntr().

But this is crazy. That's not what extra_regs are for. Also, who cares
about the banks, why is this exposed?

That is, I would very much expect a linear range of counters. You can
always decompose this counter number if you really need to somewhere
down near the hardware accessors.

  parent reply	other threads:[~2017-02-14 12:31 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-16  7:23 [PATCH v8 0/9] perf/amd/iommu: Enable multi-IOMMU support Suravee Suthikulpanit
2017-01-16  7:23 ` Suravee Suthikulpanit
     [not found] ` <1484551416-5440-1-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-16  7:23   ` [PATCH v8 1/9] perf/amd/iommu: Declare pr_fmt and remove unnecessary pr_debug Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
2017-01-16  7:23   ` [PATCH v8 2/9] perf/amd/iommu: Clean up perf_iommu_enable_event Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
2017-01-18 18:20     ` Borislav Petkov
2017-01-16  7:23   ` [PATCH v8 3/9] perf/amd/iommu: Misc fix up perf_iommu_read Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
     [not found]     ` <1484551416-5440-4-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-19 10:01       ` Borislav Petkov
2017-01-19 10:01         ` Borislav Petkov
2017-01-23 12:33     ` Peter Zijlstra
     [not found]       ` <20170123123330.GY6485-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2017-02-07  4:50         ` Suravee Suthikulpanit
2017-02-07  4:50           ` Suravee Suthikulpanit
2017-01-16  7:23   ` [PATCH v8 4/9] iommu/amd: Introduce amd_iommu_get_num_iommus() Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
2017-01-19 18:41     ` Borislav Petkov
2017-01-16  7:23   ` [PATCH v8 5/9] perf/amd/iommu: Modify functions to query max banks and counters Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
     [not found]     ` <1484551416-5440-6-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-22 19:53       ` Borislav Petkov
2017-01-22 19:53         ` Borislav Petkov
2017-01-16  7:23   ` [PATCH v8 8/9] perf/amd/iommu: Fix sysfs perf attribute groups Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
2017-01-22 19:54     ` Borislav Petkov
2017-01-16  7:23   ` [PATCH v8 9/9] perf/amd/iommu: Enable support for multiple IOMMUs Suravee Suthikulpanit
2017-01-16  7:23     ` Suravee Suthikulpanit
     [not found]     ` <1484551416-5440-10-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-22 19:55       ` Borislav Petkov
2017-01-22 19:55         ` Borislav Petkov
     [not found]         ` <20170122195531.5y4ufm7pm5qkz3yx-fF5Pk5pvG8Y@public.gmane.org>
2017-02-07  1:42           ` Suravee Suthikulpanit
2017-02-07  1:42             ` Suravee Suthikulpanit
2017-01-25  9:46       ` Peter Zijlstra
2017-01-25  9:46         ` Peter Zijlstra
     [not found]         ` <20170125094653.GO6515-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2017-01-25  9:55           ` Borislav Petkov
2017-01-25  9:55             ` Borislav Petkov
     [not found]             ` <20170125095538.42n2dnmdkhksuplk-fF5Pk5pvG8Y@public.gmane.org>
2017-02-07  1:58               ` Suravee Suthikulpanit
2017-02-07  1:58                 ` Suravee Suthikulpanit
2017-02-07  1:57           ` Suravee Suthikulpanit
2017-02-07  1:57             ` Suravee Suthikulpanit
     [not found]             ` <af2bca1a-59a9-d36c-a700-ca5360852543-5C7GfCeVMHo@public.gmane.org>
2017-02-14 12:31               ` Peter Zijlstra [this message]
2017-02-14 12:31                 ` Peter Zijlstra
     [not found]                 ` <20170214123149.GV6515-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2017-02-23 17:43                   ` Suravee Suthikulpanit
2017-02-23 17:43                     ` Suravee Suthikulpanit
     [not found]                     ` <a2d532c4-2a58-f892-eb75-ffc94f0a125a-5C7GfCeVMHo@public.gmane.org>
2017-02-23 18:11                       ` Peter Zijlstra
2017-02-23 18:11                         ` Peter Zijlstra
     [not found]                         ` <20170223181116.GJ6515-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2017-02-23 18:20                           ` Suravee Suthikulpanit
2017-02-23 18:20                             ` Suravee Suthikulpanit
2017-01-17 15:36   ` [PATCH v8 0/9] perf/amd/iommu: Enable multi-IOMMU support Joerg Roedel
2017-01-17 15:36     ` Joerg Roedel
2017-01-16  7:23 ` [PATCH v8 6/9] perf/amd/iommu: Modify amd_iommu_pc_get_set_reg_val() API to allow specifying IOMMU index Suravee Suthikulpanit
2017-01-16  7:23   ` Suravee Suthikulpanit
     [not found]   ` <1484551416-5440-7-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-22 19:53     ` Borislav Petkov
2017-01-22 19:53       ` Borislav Petkov
2017-01-16  7:23 ` [PATCH v8 7/9] perf/amd/iommu: Check return value when set and get counter value Suravee Suthikulpanit
2017-01-16  7:23   ` Suravee Suthikulpanit
     [not found]   ` <1484551416-5440-8-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-22 19:53     ` Borislav Petkov
2017-01-22 19:53       ` Borislav Petkov
2017-01-23 12:31   ` Peter Zijlstra

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