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From: joserz@linux.vnet.ibm.com
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Subject: Re: [Qemu-devel] [PATCH Risu 2/5] risu_reginfo_ppc64le: Remove unused code from PPC64 register comparison
Date: Tue, 28 Feb 2017 11:29:18 -0300	[thread overview]
Message-ID: <20170228142918.GA7745@pacoca> (raw)
In-Reply-To: <CAFEAcA_DD1KmSR+U-4jSVbycO+QwZ9ebc_k4RJ2+TqZD2jiB5w@mail.gmail.com>

On Tue, Feb 28, 2017 at 01:43:22PM +0000, Peter Maydell wrote:
> On 27 February 2017 at 19:41, Jose Ricardo Ziviani
> <joserz@linux.vnet.ibm.com> wrote:
> > Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
> > ---
> >  risu_reginfo_ppc64le.c | 8 --------
> >  1 file changed, 8 deletions(-)
> >
> > diff --git a/risu_reginfo_ppc64le.c b/risu_reginfo_ppc64le.c
> > index e6bc0e0..a76f296 100644
> > --- a/risu_reginfo_ppc64le.c
> > +++ b/risu_reginfo_ppc64le.c
> > @@ -86,14 +86,6 @@ int reginfo_is_eq(struct reginfo *m, struct reginfo *a, ucontext_t *uc)
> >                  m->vrregs.vrregs[i][1] != a->vrregs.vrregs[i][1] ||
> >                  m->vrregs.vrregs[i][2] != a->vrregs.vrregs[i][2] ||
> >                  m->vrregs.vrregs[i][3] != a->vrregs.vrregs[i][3]) {
> > -
> > -            if (uc != NULL && (m->gregs[CCR] & 0x10)) {
> > -                uc->uc_mcontext.v_regs->vrregs[i][0] = a->vrregs.vrregs[i][0];
> > -                uc->uc_mcontext.v_regs->vrregs[i][1] = a->vrregs.vrregs[i][1];
> > -                uc->uc_mcontext.v_regs->vrregs[i][2] = a->vrregs.vrregs[i][2];
> > -                uc->uc_mcontext.v_regs->vrregs[i][3] = a->vrregs.vrregs[i][3];
> > -                return 1;
> > -            }
> >              return 0;
> >          }
> >      }
> > --
> 
> I have a variation on this patch already in my set of refactoring
> patches that I posted last week:
> 
> https://lists.gnu.org/archive/html/qemu-devel/2017-02/msg06152.html

Sorry, I missed that commit. I'll send a v2 with the fix suggested by
Nikunj and without this one.

Thanks Peter

> 
> thanks
> -- PMM
> 

  reply	other threads:[~2017-02-28 14:29 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-27 19:41 [Qemu-devel] [PATCH Risu 0/5] PPC64 Improvements Jose Ricardo Ziviani
2017-02-27 19:41 ` [Qemu-devel] [PATCH Risu 1/5] risugen_ppc64: Load random 128-bit data to VSX registers Jose Ricardo Ziviani
2017-02-28  5:15   ` Nikunj A Dadhania
2017-02-27 19:41 ` [Qemu-devel] [PATCH Risu 2/5] risu_reginfo_ppc64le: Remove unused code from PPC64 register comparison Jose Ricardo Ziviani
2017-02-28 13:43   ` Peter Maydell
2017-02-28 14:29     ` joserz [this message]
2017-02-28 18:01       ` Peter Maydell
2017-02-27 19:41 ` [Qemu-devel] [PATCH Risu 3/5] configure: Add initial support to PPC64 (big endian) Jose Ricardo Ziviani
2017-02-27 19:41 ` [Qemu-devel] [PATCH Risu 4/5] risugen, risugen_ppc64.pm: Add support ppc64 (big-endian) Jose Ricardo Ziviani
2017-02-27 19:41 ` [Qemu-devel] [PATCH Risu 5/5] risugen_ppc64: Remove unused code Jose Ricardo Ziviani

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